978a17d1a6
Add a basic dts for the Microchip Smart Embedded Vision dev kit. The SEV kit is an upcoming first party board, featuring an MPFS250T and: - Dual Sony Camera Sensors (IMX334) - IEEE 802.11 b/g/n 20MHz (1x1) Wi-Fi - Bluetooth 5 Low Energy - 4 GB DDR4 x64 - 2 GB LPDDR4 x32 - 1 GB SPI Flash - 8 GB eMMC flash & SD card slot (multiplexed) - HDMI2.0 Video Input/Output - MIPI DSI Output - MIPI CSI-2 Input Link: https://onlinedocs.microchip.com/pr/GUID-404D3738-DC76-46BA-8683-6A77E837C2DD-en-US-1/index.html?GUID-065AEBEE-7B2C-4895-8579-B1D73D797F06 Signed-off-by: Vattipalli Praveen <praveen.kumar@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
145 lines
2.2 KiB
Text
145 lines
2.2 KiB
Text
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/* Copyright (c) 2022 Microchip Technology Inc */
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/dts-v1/;
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#include "mpfs.dtsi"
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#include "mpfs-sev-kit-fabric.dtsi"
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/* Clock frequency (in Hz) of the rtcclk */
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#define MTIMER_FREQ 1000000
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/ {
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#address-cells = <2>;
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#size-cells = <2>;
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model = "Microchip PolarFire-SoC SEV Kit";
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compatible = "microchip,mpfs-sev-kit", "microchip,mpfs";
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aliases {
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ethernet0 = &mac1;
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serial0 = &mmuart0;
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serial1 = &mmuart1;
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serial2 = &mmuart2;
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serial3 = &mmuart3;
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serial4 = &mmuart4;
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};
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chosen {
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stdout-path = "serial1:115200n8";
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};
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cpus {
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timebase-frequency = <MTIMER_FREQ>;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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fabricbuf0ddrc: buffer@80000000 {
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compatible = "shared-dma-pool";
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reg = <0x0 0x80000000 0x0 0x2000000>;
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};
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fabricbuf1ddrnc: buffer@c4000000 {
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compatible = "shared-dma-pool";
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reg = <0x0 0xc4000000 0x0 0x4000000>;
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};
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fabricbuf2ddrncwcb: buffer@d4000000 {
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compatible = "shared-dma-pool";
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reg = <0x0 0xd4000000 0x0 0x4000000>;
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};
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};
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ddrc_cache: memory@1000000000 {
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device_type = "memory";
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reg = <0x10 0x0 0x0 0x76000000>;
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};
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};
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&i2c0 {
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status = "okay";
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};
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&gpio2 {
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interrupts = <53>, <53>, <53>, <53>,
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<53>, <53>, <53>, <53>,
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<53>, <53>, <53>, <53>,
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<53>, <53>, <53>, <53>,
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<53>, <53>, <53>, <53>,
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<53>, <53>, <53>, <53>,
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<53>, <53>, <53>, <53>,
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<53>, <53>, <53>, <53>;
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status = "okay";
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};
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&mac0 {
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status = "okay";
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phy-mode = "sgmii";
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phy-handle = <&phy0>;
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phy1: ethernet-phy@9 {
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reg = <9>;
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};
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phy0: ethernet-phy@8 {
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reg = <8>;
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};
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};
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&mac1 {
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status = "okay";
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phy-mode = "sgmii";
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phy-handle = <&phy1>;
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};
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&mbox {
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status = "okay";
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};
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&mmc {
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status = "okay";
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bus-width = <4>;
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disable-wp;
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cap-sd-highspeed;
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cap-mmc-highspeed;
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mmc-ddr-1_8v;
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mmc-hs200-1_8v;
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sd-uhs-sdr12;
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sd-uhs-sdr25;
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sd-uhs-sdr50;
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sd-uhs-sdr104;
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};
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&mmuart1 {
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status = "okay";
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};
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&mmuart2 {
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status = "okay";
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};
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&mmuart3 {
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status = "okay";
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};
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&mmuart4 {
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status = "okay";
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};
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&refclk {
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clock-frequency = <125000000>;
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};
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&rtc {
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status = "okay";
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};
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&syscontroller {
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status = "okay";
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};
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&usb {
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status = "okay";
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dr_mode = "otg";
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};
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