1a324a40b4
Enable SDP error detection configuration, this will set CRC16 in 128b/132b link layer. For Display version 13 a hardware bit31 in register VIDEO_DIP_CTL is added to enable/disable SDP CRC applicable for DP2.0 only, but the default value of this bit will enable CRC16 in 128b/132b hence skipping this write. Corrective actions on SDP corruption is yet to be defined. v2: Moved the CRC enable to link training init(Jani N) v3: Moved crc enable to ddi pre enable <Jani N> v4: Separate function for SDP CRC16 (Jani N) Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230302081532.765821-3-arun.r.murthy@intel.com
44 lines
1.5 KiB
C
44 lines
1.5 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef __INTEL_DP_LINK_TRAINING_H__
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#define __INTEL_DP_LINK_TRAINING_H__
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#include <drm/display/drm_dp_helper.h>
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struct intel_crtc_state;
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struct intel_dp;
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int intel_dp_init_lttpr_and_dprx_caps(struct intel_dp *intel_dp);
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void intel_dp_get_adjust_train(struct intel_dp *intel_dp,
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const struct intel_crtc_state *crtc_state,
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enum drm_dp_phy dp_phy,
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const u8 link_status[DP_LINK_STATUS_SIZE]);
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void intel_dp_program_link_training_pattern(struct intel_dp *intel_dp,
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const struct intel_crtc_state *crtc_state,
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enum drm_dp_phy dp_phy,
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u8 dp_train_pat);
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void intel_dp_set_signal_levels(struct intel_dp *intel_dp,
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const struct intel_crtc_state *crtc_state,
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enum drm_dp_phy dp_phy);
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void intel_dp_start_link_train(struct intel_dp *intel_dp,
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const struct intel_crtc_state *crtc_state);
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void intel_dp_stop_link_train(struct intel_dp *intel_dp,
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const struct intel_crtc_state *crtc_state);
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void
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intel_dp_dump_link_status(struct intel_dp *intel_dp, enum drm_dp_phy dp_phy,
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const u8 link_status[DP_LINK_STATUS_SIZE]);
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/* Get the TPSx symbol type of the value programmed to DP_TRAINING_PATTERN_SET */
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static inline u8 intel_dp_training_pattern_symbol(u8 pattern)
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{
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return pattern & ~DP_LINK_SCRAMBLING_DISABLE;
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}
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void intel_dp_128b132b_sdp_crc16(struct intel_dp *intel_dp,
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const struct intel_crtc_state *crtc_state);
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#endif /* __INTEL_DP_LINK_TRAINING_H__ */
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