66560f3305
At least on some platforms (tested on ctg) the way vgacon does screen blanking seems to flag constant FIFO underruns, which means we have to be prepared for them while the driver is loading. Currently there is a time window between drm_crtc_init() and intel_sanitize_fifo_underrun_reporting() during which FIFO underrun reporting is in fact marked as enabled. Thus we may end up mistakenly detecting these bogus underruns during driver init. Close the race by marking FIFO underrun reporting as disabled prior to even registering the crtc. intel_sanitize_fifo_underrun_reporting()/etc. will re-enable it later if needed. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230125185234.21599-2-ville.syrjala@linux.intel.com Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
29 lines
990 B
C
29 lines
990 B
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef __INTEL_FIFO_UNDERRUN_H__
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#define __INTEL_FIFO_UNDERRUN_H__
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#include <linux/types.h>
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struct drm_i915_private;
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struct intel_crtc;
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enum pipe;
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void intel_init_fifo_underrun_reporting(struct drm_i915_private *i915,
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struct intel_crtc *crtc, bool enable);
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bool intel_set_cpu_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
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enum pipe pipe, bool enable);
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bool intel_set_pch_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
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enum pipe pch_transcoder,
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bool enable);
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void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
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enum pipe pipe);
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void intel_pch_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
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enum pipe pch_transcoder);
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void intel_check_cpu_fifo_underruns(struct drm_i915_private *dev_priv);
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void intel_check_pch_fifo_underruns(struct drm_i915_private *dev_priv);
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#endif /* __INTEL_FIFO_UNDERRUN_H__ */
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