Dillon Varone 8c2f14c36f drm/amd/display: Add changes for dsc bpp in 16ths and unify bw calculations ... [Why?] Some code still expected bpp to be used in whole bits, not 16ths. dsc.c uses redundant function now found in dc to calculate stream bandwidth from timing. [How?] Fix code to work with 16ths instead of whole bits for dsc bpp. Refactor get_dsc_bandwidth to accept inputs in 16ths of a bit. Use dc function to calculate bandwidth from timing, and make dsc bw calculation a part of dsc.c. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Dillon Varone <dillon.varone@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Solomon Chiu <solomon.chiu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2021-03-23 23:32:31 -04:00
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dc_dsc.c	drm/amd/display: Add changes for dsc bpp in 16ths and unify bw calculations	2021-03-23 23:32:31 -04:00
dscc_types.h	drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTED	2019-11-13 15:29:44 -05:00
Makefile	drm/amdgpu/display: drop DCN support for aarch64	2021-01-05 11:35:53 -05:00
qp_tables.h	drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTED	2019-11-13 15:29:44 -05:00
rc_calc.c	drm/amd/display: Fix compilation error	2020-11-02 15:29:33 -05:00
rc_calc.h	drm/amd/display: Fix compilation error	2020-11-02 15:29:33 -05:00
rc_calc_dpi.c	drm/amd/display: Rework dsc to isolate FPU operations	2020-07-01 01:59:20 -04:00