Tony Cheng ab7044d0d1 drm/amd/display: refactor clk_resync to avoid assertion ... - not all DCE has PHYPLLA_PIXCLK_DOUBLE_RATE_ENABLE bit defined. Signed-off-by: Tony Cheng <tony.cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2017-09-26 17:10:52 -04:00
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amdgpu_dm	drm/amd/display: Use pflip prepare and submit parts (v2)	2017-09-26 17:10:03 -04:00
dc	drm/amd/display: refactor clk_resync to avoid assertion	2017-09-26 17:10:52 -04:00
include	drm/amd/display: remove dead code	2017-09-26 17:10:34 -04:00
modules	drm/amd/display: Disable Modules at Runtime	2017-09-26 17:09:52 -04:00
Kconfig	drm/amd/dc: Add dc display driver (v2)	2017-09-26 17:01:32 -04:00
Makefile	drm/amd/dc: Add dc display driver (v2)	2017-09-26 17:01:32 -04:00