ae85b23c65
pci_get_legacy_ide_irq() is only used on platforms that support PNP, so many architectures define it but never use it. Replace uses of it with ATA_PRIMARY_IRQ() and ATA_SECONDARY_IRQ(), which provide the same functionality. Since pci_get_legacy_ide_irq() is no longer used, remove all the architecture-specific definitions of it as well as asm-generic/pci.h, which only provides pci_get_legacy_ide_irq() [bhelgaas: commit log] Co-developed-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20220722214944.831438-2-shorne@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Pierre Morel <pmorel@linux.ibm.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
94 lines
2.5 KiB
C
94 lines
2.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ALPHA_PCI_H
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#define __ALPHA_PCI_H
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#ifdef __KERNEL__
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#include <linux/spinlock.h>
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#include <linux/dma-mapping.h>
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#include <linux/scatterlist.h>
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#include <asm/machvec.h>
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/*
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* The following structure is used to manage multiple PCI busses.
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*/
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struct pci_iommu_arena;
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struct page;
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/* A controller. Used to manage multiple PCI busses. */
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struct pci_controller {
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struct pci_controller *next;
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struct pci_bus *bus;
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struct resource *io_space;
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struct resource *mem_space;
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/* The following are for reporting to userland. The invariant is
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that if we report a BWX-capable dense memory, we do not report
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a sparse memory at all, even if it exists. */
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unsigned long sparse_mem_base;
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unsigned long dense_mem_base;
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unsigned long sparse_io_base;
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unsigned long dense_io_base;
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/* This one's for the kernel only. It's in KSEG somewhere. */
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unsigned long config_space_base;
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unsigned int index;
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/* For compatibility with current (as of July 2003) pciutils
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and XFree86. Eventually will be removed. */
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unsigned int need_domain_info;
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struct pci_iommu_arena *sg_pci;
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struct pci_iommu_arena *sg_isa;
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void *sysdata;
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};
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/* Override the logic in pci_scan_bus for skipping already-configured
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bus numbers. */
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#define pcibios_assign_all_busses() 1
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#define PCIBIOS_MIN_IO alpha_mv.min_io_address
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#define PCIBIOS_MIN_MEM alpha_mv.min_mem_address
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/* IOMMU controls. */
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#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
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static inline int pci_proc_domain(struct pci_bus *bus)
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{
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struct pci_controller *hose = bus->sysdata;
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return hose->need_domain_info;
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}
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#endif /* __KERNEL__ */
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/* Values for the `which' argument to sys_pciconfig_iobase. */
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#define IOBASE_HOSE 0
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#define IOBASE_SPARSE_MEM 1
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#define IOBASE_DENSE_MEM 2
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#define IOBASE_SPARSE_IO 3
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#define IOBASE_DENSE_IO 4
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#define IOBASE_ROOT_BUS 5
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#define IOBASE_FROM_HOSE 0x10000
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extern struct pci_dev *isa_bridge;
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extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
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size_t count);
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extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val,
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size_t count);
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extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
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struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state);
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extern void pci_adjust_legacy_attr(struct pci_bus *bus,
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enum pci_mmap_state mmap_type);
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#define HAVE_PCI_LEGACY 1
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extern int pci_create_resource_files(struct pci_dev *dev);
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extern void pci_remove_resource_files(struct pci_dev *dev);
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#endif /* __ALPHA_PCI_H */
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