8740196935
A recent commit moved the backlight control code along with the register defines, but did not move the power control code. This along with remnant fields in the dce110_link_enc_registers struct made it so that the code still compiled, but any attempts to access the LVTMA_PWRSEQ_STATE register led to reading from an address of 0. This patch corrects that. Also, rename blacklight_control to edp_backlight_control (Typo fix). Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
79 lines
2.5 KiB
C
79 lines
2.5 KiB
C
/*
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* Copyright 2015 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#ifndef __DC_LINK_HWSS_H__
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#define __DC_LINK_HWSS_H__
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#include "inc/core_status.h"
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enum dc_status core_link_read_dpcd(
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struct dc_link *link,
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uint32_t address,
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uint8_t *data,
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uint32_t size);
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enum dc_status core_link_write_dpcd(
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struct dc_link *link,
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uint32_t address,
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const uint8_t *data,
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uint32_t size);
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struct gpio *get_hpd_gpio(struct dc_bios *dcb,
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struct graphics_object_id link_id,
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struct gpio_service *gpio_service);
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void dp_enable_link_phy(
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struct dc_link *link,
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enum signal_type signal,
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enum clock_source_id clock_source,
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const struct dc_link_settings *link_settings);
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void dp_receiver_power_ctrl(struct dc_link *link, bool on);
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void dp_disable_link_phy(struct dc_link *link, enum signal_type signal);
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void dp_disable_link_phy_mst(struct dc_link *link, enum signal_type signal);
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bool dp_set_hw_training_pattern(
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struct dc_link *link,
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enum hw_dp_training_pattern pattern);
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void dp_set_hw_lane_settings(
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struct dc_link *link,
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const struct link_training_settings *link_settings);
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void dp_set_hw_test_pattern(
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struct dc_link *link,
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enum dp_test_pattern test_pattern,
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uint8_t *custom_pattern,
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uint32_t custom_pattern_size);
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enum dp_panel_mode dp_get_panel_mode(struct dc_link *link);
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void dp_retrain_link_dp_test(struct dc_link *link,
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struct dc_link_settings *link_setting,
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bool skip_video_pattern);
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#endif /* __DC_LINK_HWSS_H__ */
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