043cb41a85
On strict kernel memory permission, we couldn't patch code without writable permission. Preserve two holes in fixmap area, so we can map the kernel code temporarily to fixmap area, then patch the instructions. We need two pages here because we support the compressed instruction, so the instruction might be align to 2 bytes. When patching the 32-bit length instruction which is 2 bytes alignment, it will across two pages. Introduce two interfaces to patch kernel code: riscv_patch_text_nosync: - patch code without synchronization, it's caller's responsibility to synchronize all CPUs if needed. riscv_patch_text: - patch code and always synchronize with stop_machine() Signed-off-by: Zong Li <zong.li@sifive.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
12 lines
285 B
C
12 lines
285 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2020 SiFive
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*/
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#ifndef _ASM_RISCV_PATCH_H
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#define _ASM_RISCV_PATCH_H
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int riscv_patch_text_nosync(void *addr, const void *insns, size_t len);
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int riscv_patch_text(void *addr, u32 insn);
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#endif /* _ASM_RISCV_PATCH_H */
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