b87f920b93
The hardware mailboxes are used by the driver to submit requests to firmware and receive the completion notices from hardware. Initially, a management mailbox channel is up and running. The driver may request firmware to create/destroy more channels dynamically through management channel. Add driver internal mailbox interfaces. - create/destroy a mailbox channel instance - send a message to the firmware through a specific channel - wait for a notification from the specific channel Co-developed-by: George Yang <George.Yang@amd.com> Signed-off-by: George Yang <George.Yang@amd.com> Co-developed-by: Min Ma <min.ma@amd.com> Signed-off-by: Min Ma <min.ma@amd.com> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Lizhi Hou <lizhi.hou@amd.com> Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241118172942.2014541-4-lizhi.hou@amd.com
144 lines
3.3 KiB
C
144 lines
3.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2022-2024, Advanced Micro Devices, Inc.
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*/
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#include <drm/drm_device.h>
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#include <drm/drm_managed.h>
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#include <drm/drm_print.h>
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#include <linux/bitfield.h>
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#include <linux/iopoll.h>
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#include "aie2_pci.h"
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#include "amdxdna_mailbox.h"
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#include "amdxdna_pci_drv.h"
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#define PSP_STATUS_READY BIT(31)
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/* PSP commands */
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#define PSP_VALIDATE 1
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#define PSP_START 2
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#define PSP_RELEASE_TMR 3
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/* PSP special arguments */
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#define PSP_START_COPY_FW 1
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/* PSP response error code */
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#define PSP_ERROR_CANCEL 0xFFFF0002
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#define PSP_ERROR_BAD_STATE 0xFFFF0007
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#define PSP_FW_ALIGN 0x10000
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#define PSP_POLL_INTERVAL 20000 /* us */
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#define PSP_POLL_TIMEOUT 1000000 /* us */
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#define PSP_REG(p, reg) ((p)->psp_regs[reg])
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struct psp_device {
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struct drm_device *ddev;
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struct psp_config conf;
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u32 fw_buf_sz;
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u64 fw_paddr;
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void *fw_buffer;
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void __iomem *psp_regs[PSP_MAX_REGS];
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};
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static int psp_exec(struct psp_device *psp, u32 *reg_vals)
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{
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u32 resp_code;
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int ret, i;
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u32 ready;
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/* Write command and argument registers */
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for (i = 0; i < PSP_NUM_IN_REGS; i++)
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writel(reg_vals[i], PSP_REG(psp, i));
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/* clear and set PSP INTR register to kick off */
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writel(0, PSP_REG(psp, PSP_INTR_REG));
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writel(1, PSP_REG(psp, PSP_INTR_REG));
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/* PSP should be busy. Wait for ready, so we know task is done. */
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ret = readx_poll_timeout(readl, PSP_REG(psp, PSP_STATUS_REG), ready,
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FIELD_GET(PSP_STATUS_READY, ready),
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PSP_POLL_INTERVAL, PSP_POLL_TIMEOUT);
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if (ret) {
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drm_err(psp->ddev, "PSP is not ready, ret 0x%x", ret);
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return ret;
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}
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resp_code = readl(PSP_REG(psp, PSP_RESP_REG));
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if (resp_code) {
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drm_err(psp->ddev, "fw return error 0x%x", resp_code);
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return -EIO;
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}
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return 0;
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}
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void aie2_psp_stop(struct psp_device *psp)
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{
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u32 reg_vals[PSP_NUM_IN_REGS] = { PSP_RELEASE_TMR, };
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int ret;
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ret = psp_exec(psp, reg_vals);
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if (ret)
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drm_err(psp->ddev, "release tmr failed, ret %d", ret);
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}
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int aie2_psp_start(struct psp_device *psp)
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{
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u32 reg_vals[PSP_NUM_IN_REGS];
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int ret;
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reg_vals[0] = PSP_VALIDATE;
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reg_vals[1] = lower_32_bits(psp->fw_paddr);
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reg_vals[2] = upper_32_bits(psp->fw_paddr);
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reg_vals[3] = psp->fw_buf_sz;
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ret = psp_exec(psp, reg_vals);
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if (ret) {
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drm_err(psp->ddev, "failed to validate fw, ret %d", ret);
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return ret;
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}
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memset(reg_vals, 0, sizeof(reg_vals));
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reg_vals[0] = PSP_START;
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reg_vals[1] = PSP_START_COPY_FW;
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ret = psp_exec(psp, reg_vals);
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if (ret) {
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drm_err(psp->ddev, "failed to start fw, ret %d", ret);
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return ret;
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}
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return 0;
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}
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struct psp_device *aie2m_psp_create(struct drm_device *ddev, struct psp_config *conf)
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{
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struct psp_device *psp;
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u64 offset;
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psp = drmm_kzalloc(ddev, sizeof(*psp), GFP_KERNEL);
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if (!psp)
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return NULL;
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psp->ddev = ddev;
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memcpy(psp->psp_regs, conf->psp_regs, sizeof(psp->psp_regs));
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psp->fw_buf_sz = ALIGN(conf->fw_size, PSP_FW_ALIGN) + PSP_FW_ALIGN;
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psp->fw_buffer = drmm_kmalloc(ddev, psp->fw_buf_sz, GFP_KERNEL);
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if (!psp->fw_buffer) {
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drm_err(ddev, "no memory for fw buffer");
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return NULL;
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}
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/*
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* AMD Platform Security Processor(PSP) requires host physical
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* address to load NPU firmware.
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*/
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psp->fw_paddr = virt_to_phys(psp->fw_buffer);
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offset = ALIGN(psp->fw_paddr, PSP_FW_ALIGN) - psp->fw_paddr;
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psp->fw_paddr += offset;
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memcpy(psp->fw_buffer + offset, conf->fw_buf, conf->fw_size);
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return psp;
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}
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