The topology related information is randomly scattered across cpuinfo_x86. Create a new structure cpuinfo_topo and move in a first step initial_apicid and apicid into it. Aside of being better readable this is in preparation for replacing the horribly fragile CPU topology evaluation code further down the road. Consolidate APIC ID fields to u32 as that represents the hardware type. No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Juergen Gross <jgross@suse.com> Tested-by: Sohil Mehta <sohil.mehta@intel.com> Tested-by: Michael Kelley <mikelley@microsoft.com> Tested-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Zhang Rui <rui.zhang@intel.com> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/20230814085112.269787744@linutronix.de
200 lines
5.1 KiB
C
200 lines
5.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/smp.h>
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#include <linux/timex.h>
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#include <linux/string.h>
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#include <linux/seq_file.h>
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#include <linux/cpufreq.h>
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#include <asm/prctl.h>
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#include <linux/proc_fs.h>
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#include "cpu.h"
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#ifdef CONFIG_X86_VMX_FEATURE_NAMES
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extern const char * const x86_vmx_flags[NVMXINTS*32];
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#endif
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/*
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* Get CPU information for use by the procfs.
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*/
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static void show_cpuinfo_core(struct seq_file *m, struct cpuinfo_x86 *c,
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unsigned int cpu)
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{
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#ifdef CONFIG_SMP
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seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
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seq_printf(m, "siblings\t: %d\n",
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cpumask_weight(topology_core_cpumask(cpu)));
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seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
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seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
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seq_printf(m, "apicid\t\t: %d\n", c->topo.apicid);
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seq_printf(m, "initial apicid\t: %d\n", c->topo.initial_apicid);
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#endif
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}
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#ifdef CONFIG_X86_32
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static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c)
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{
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seq_printf(m,
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"fdiv_bug\t: %s\n"
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"f00f_bug\t: %s\n"
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"coma_bug\t: %s\n"
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"fpu\t\t: %s\n"
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"fpu_exception\t: %s\n"
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"cpuid level\t: %d\n"
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"wp\t\t: yes\n",
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boot_cpu_has_bug(X86_BUG_FDIV) ? "yes" : "no",
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boot_cpu_has_bug(X86_BUG_F00F) ? "yes" : "no",
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boot_cpu_has_bug(X86_BUG_COMA) ? "yes" : "no",
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boot_cpu_has(X86_FEATURE_FPU) ? "yes" : "no",
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boot_cpu_has(X86_FEATURE_FPU) ? "yes" : "no",
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c->cpuid_level);
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}
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#else
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static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c)
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{
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seq_printf(m,
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"fpu\t\t: yes\n"
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"fpu_exception\t: yes\n"
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"cpuid level\t: %d\n"
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"wp\t\t: yes\n",
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c->cpuid_level);
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}
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#endif
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static int show_cpuinfo(struct seq_file *m, void *v)
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{
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struct cpuinfo_x86 *c = v;
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unsigned int cpu;
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int i;
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cpu = c->cpu_index;
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seq_printf(m, "processor\t: %u\n"
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"vendor_id\t: %s\n"
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"cpu family\t: %d\n"
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"model\t\t: %u\n"
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"model name\t: %s\n",
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cpu,
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c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
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c->x86,
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c->x86_model,
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c->x86_model_id[0] ? c->x86_model_id : "unknown");
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if (c->x86_stepping || c->cpuid_level >= 0)
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seq_printf(m, "stepping\t: %d\n", c->x86_stepping);
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else
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seq_puts(m, "stepping\t: unknown\n");
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if (c->microcode)
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seq_printf(m, "microcode\t: 0x%x\n", c->microcode);
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if (cpu_has(c, X86_FEATURE_TSC)) {
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unsigned int freq = arch_freq_get_on_cpu(cpu);
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seq_printf(m, "cpu MHz\t\t: %u.%03u\n", freq / 1000, (freq % 1000));
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}
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/* Cache size */
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if (c->x86_cache_size)
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seq_printf(m, "cache size\t: %u KB\n", c->x86_cache_size);
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show_cpuinfo_core(m, c, cpu);
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show_cpuinfo_misc(m, c);
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seq_puts(m, "flags\t\t:");
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for (i = 0; i < 32*NCAPINTS; i++)
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if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
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seq_printf(m, " %s", x86_cap_flags[i]);
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#ifdef CONFIG_X86_VMX_FEATURE_NAMES
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if (cpu_has(c, X86_FEATURE_VMX) && c->vmx_capability[0]) {
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seq_puts(m, "\nvmx flags\t:");
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for (i = 0; i < 32*NVMXINTS; i++) {
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if (test_bit(i, (unsigned long *)c->vmx_capability) &&
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x86_vmx_flags[i] != NULL)
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seq_printf(m, " %s", x86_vmx_flags[i]);
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}
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}
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#endif
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seq_puts(m, "\nbugs\t\t:");
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for (i = 0; i < 32*NBUGINTS; i++) {
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unsigned int bug_bit = 32*NCAPINTS + i;
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if (cpu_has_bug(c, bug_bit) && x86_bug_flags[i])
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seq_printf(m, " %s", x86_bug_flags[i]);
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}
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seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
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c->loops_per_jiffy/(500000/HZ),
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(c->loops_per_jiffy/(5000/HZ)) % 100);
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#ifdef CONFIG_X86_64
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if (c->x86_tlbsize > 0)
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seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
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#endif
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seq_printf(m, "clflush size\t: %u\n", c->x86_clflush_size);
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seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
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seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
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c->x86_phys_bits, c->x86_virt_bits);
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seq_puts(m, "power management:");
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for (i = 0; i < 32; i++) {
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if (c->x86_power & (1 << i)) {
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if (i < ARRAY_SIZE(x86_power_flags) &&
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x86_power_flags[i])
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seq_printf(m, "%s%s",
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x86_power_flags[i][0] ? " " : "",
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x86_power_flags[i]);
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else
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seq_printf(m, " [%d]", i);
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}
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}
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seq_puts(m, "\n\n");
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return 0;
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}
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static void *c_start(struct seq_file *m, loff_t *pos)
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{
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*pos = cpumask_next(*pos - 1, cpu_online_mask);
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if ((*pos) < nr_cpu_ids)
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return &cpu_data(*pos);
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return NULL;
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}
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static void *c_next(struct seq_file *m, void *v, loff_t *pos)
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{
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(*pos)++;
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return c_start(m, pos);
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}
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static void c_stop(struct seq_file *m, void *v)
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{
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}
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const struct seq_operations cpuinfo_op = {
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.start = c_start,
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.next = c_next,
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.stop = c_stop,
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.show = show_cpuinfo,
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};
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#ifdef CONFIG_X86_USER_SHADOW_STACK
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static void dump_x86_features(struct seq_file *m, unsigned long features)
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{
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if (features & ARCH_SHSTK_SHSTK)
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seq_puts(m, "shstk ");
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if (features & ARCH_SHSTK_WRSS)
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seq_puts(m, "wrss ");
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}
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void arch_proc_pid_thread_features(struct seq_file *m, struct task_struct *task)
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{
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seq_puts(m, "x86_Thread_features:\t");
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dump_x86_features(m, task->thread.features);
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seq_putc(m, '\n');
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seq_puts(m, "x86_Thread_features_locked:\t");
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dump_x86_features(m, task->thread.features_locked);
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seq_putc(m, '\n');
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}
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#endif /* CONFIG_X86_USER_SHADOW_STACK */
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