f2c6c22fa8
LLVM's integrated assembler does not support 'slti <reg>, <imm>':
<instantiation>:16:12: error: invalid operand for instruction
slti $12, (0x6300 | 0x0008)
^
arch/mips/kernel/head.S:86:2: note: while in macro instantiation
kernel_entry_setup # cpu specific setup
^
<instantiation>:16:12: error: invalid operand for instruction
slti $12, (0x6300 | 0x0008)
^
arch/mips/kernel/head.S:150:2: note: while in macro instantiation
smp_slave_setup
^
To increase compatibility with LLVM's integrated assembler, use the full
form of 'slti <reg>, <reg>, <imm>', which matches the rest of
arch/mips/. This does not result in any change for GNU as.
Link: https://github.com/ClangBuiltLinux/linux/issues/1526
Reported-by: Ryutaroh Matsumoto <ryutaroh@ict.e.titech.ac.jp>
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
105 lines
2.8 KiB
C
105 lines
2.8 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2005 Embedded Alley Solutions, Inc
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* Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
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* Copyright (C) 2009 Jiajie Chen (chenjiajie@cse.buaa.edu.cn)
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* Copyright (C) 2012 Huacai Chen (chenhc@lemote.com)
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*/
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#ifndef __ASM_MACH_LOONGSON64_KERNEL_ENTRY_H
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#define __ASM_MACH_LOONGSON64_KERNEL_ENTRY_H
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#include <asm/cpu.h>
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/*
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* Override macros used in arch/mips/kernel/head.S.
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*/
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.macro kernel_entry_setup
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.set push
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.set mips64
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/* Set ELPA on LOONGSON3 pagegrain */
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mfc0 t0, CP0_PAGEGRAIN
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or t0, (0x1 << 29)
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mtc0 t0, CP0_PAGEGRAIN
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/* Enable STFill Buffer */
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mfc0 t0, CP0_PRID
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/* Loongson-3A R4+ */
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andi t1, t0, PRID_IMP_MASK
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li t2, PRID_IMP_LOONGSON_64G
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beq t1, t2, 1f
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nop
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/* Loongson-3A R2/R3 */
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andi t0, (PRID_IMP_MASK | PRID_REV_MASK)
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slti t0, t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0)
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bnez t0, 2f
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nop
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1:
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mfc0 t0, CP0_CONFIG6
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or t0, 0x100
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mtc0 t0, CP0_CONFIG6
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2:
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_ehb
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.set pop
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.endm
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/*
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* Do SMP slave processor setup.
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*/
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.macro smp_slave_setup
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.set push
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.set mips64
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/* Set ELPA on LOONGSON3 pagegrain */
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mfc0 t0, CP0_PAGEGRAIN
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or t0, (0x1 << 29)
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mtc0 t0, CP0_PAGEGRAIN
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/* Enable STFill Buffer */
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mfc0 t0, CP0_PRID
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/* Loongson-3A R4+ */
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andi t1, t0, PRID_IMP_MASK
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li t2, PRID_IMP_LOONGSON_64G
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beq t1, t2, 1f
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nop
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/* Loongson-3A R2/R3 */
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andi t0, (PRID_IMP_MASK | PRID_REV_MASK)
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slti t0, t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0)
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bnez t0, 2f
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nop
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1:
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mfc0 t0, CP0_CONFIG6
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or t0, 0x100
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mtc0 t0, CP0_CONFIG6
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2:
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_ehb
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.set pop
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.endm
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#define USE_KEXEC_SMP_WAIT_FINAL
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.macro kexec_smp_wait_final
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/* s0:prid s1:initfn */
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/* a0:base t1:cpuid t2:node t9:count */
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mfc0 t1, CP0_EBASE
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andi t1, MIPS_EBASE_CPUNUM
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dins a0, t1, 8, 2 /* insert core id*/
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dext t2, t1, 2, 2
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dins a0, t2, 44, 2 /* insert node id */
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mfc0 s0, CP0_PRID
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andi s0, s0, (PRID_IMP_MASK | PRID_REV_MASK)
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beq s0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3B_R1), 1f
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beq s0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3B_R2), 1f
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b 2f /* Loongson-3A1000/3A2000/3A3000/3A4000 */
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1: dins a0, t2, 14, 2 /* Loongson-3B1000/3B1500 need bit 15~14 */
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2: li t9, 0x100 /* wait for init loop */
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3: addiu t9, -1 /* limit mailbox access */
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bnez t9, 3b
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lw s1, 0x20(a0) /* check PC as an indicator */
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beqz s1, 2b
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ld s1, 0x20(a0) /* get PC via mailbox reg0 */
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ld sp, 0x28(a0) /* get SP via mailbox reg1 */
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ld gp, 0x30(a0) /* get GP via mailbox reg2 */
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ld a1, 0x38(a0)
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jr s1 /* jump to initial PC */
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.endm
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#endif /* __ASM_MACH_LOONGSON64_KERNEL_ENTRY_H */
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