d2912cb15b
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
62 lines
1.3 KiB
C
62 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Ralink SoC register definitions
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*
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* Copyright (C) 2013 John Crispin <john@phrozen.org>
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* Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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*/
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#ifndef _RALINK_REGS_H_
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#define _RALINK_REGS_H_
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#include <linux/io.h>
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enum ralink_soc_type {
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RALINK_UNKNOWN = 0,
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RT2880_SOC,
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RT3883_SOC,
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RT305X_SOC_RT3050,
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RT305X_SOC_RT3052,
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RT305X_SOC_RT3350,
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RT305X_SOC_RT3352,
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RT305X_SOC_RT5350,
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MT762X_SOC_MT7620A,
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MT762X_SOC_MT7620N,
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MT762X_SOC_MT7621AT,
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MT762X_SOC_MT7628AN,
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MT762X_SOC_MT7688,
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};
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extern enum ralink_soc_type ralink_soc;
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extern __iomem void *rt_sysc_membase;
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extern __iomem void *rt_memc_membase;
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static inline void rt_sysc_w32(u32 val, unsigned reg)
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{
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__raw_writel(val, rt_sysc_membase + reg);
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}
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static inline u32 rt_sysc_r32(unsigned reg)
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{
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return __raw_readl(rt_sysc_membase + reg);
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}
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static inline void rt_sysc_m32(u32 clr, u32 set, unsigned reg)
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{
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u32 val = rt_sysc_r32(reg) & ~clr;
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__raw_writel(val | set, rt_sysc_membase + reg);
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}
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static inline void rt_memc_w32(u32 val, unsigned reg)
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{
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__raw_writel(val, rt_memc_membase + reg);
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}
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static inline u32 rt_memc_r32(unsigned reg)
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{
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return __raw_readl(rt_memc_membase + reg);
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}
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#endif /* _RALINK_REGS_H_ */
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