685d982112
- The biggest change is the rework of the percpu code,
to support the 'Named Address Spaces' GCC feature,
by Uros Bizjak:
- This allows C code to access GS and FS segment relative
memory via variables declared with such attributes,
which allows the compiler to better optimize those accesses
than the previous inline assembly code.
- The series also includes a number of micro-optimizations
for various percpu access methods, plus a number of
cleanups of %gs accesses in assembly code.
- These changes have been exposed to linux-next testing for
the last ~5 months, with no known regressions in this area.
- Fix/clean up __switch_to()'s broken but accidentally
working handling of FPU switching - which also generates
better code.
- Propagate more RIP-relative addressing in assembly code,
to generate slightly better code.
- Rework the CPU mitigations Kconfig space to be less idiosyncratic,
to make it easier for distros to follow & maintain these options.
- Rework the x86 idle code to cure RCU violations and
to clean up the logic.
- Clean up the vDSO Makefile logic.
- Misc cleanups and fixes.
[ Please note that there's a higher number of merge commits in
this branch (three) than is usual in x86 topic trees. This happened
due to the long testing lifecycle of the percpu changes that
involved 3 merge windows, which generated a longer history
and various interactions with other core x86 changes that we
felt better about to carry in a single branch. ]
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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Merge tag 'x86-core-2024-03-11' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull core x86 updates from Ingo Molnar:
- The biggest change is the rework of the percpu code, to support the
'Named Address Spaces' GCC feature, by Uros Bizjak:
- This allows C code to access GS and FS segment relative memory
via variables declared with such attributes, which allows the
compiler to better optimize those accesses than the previous
inline assembly code.
- The series also includes a number of micro-optimizations for
various percpu access methods, plus a number of cleanups of %gs
accesses in assembly code.
- These changes have been exposed to linux-next testing for the
last ~5 months, with no known regressions in this area.
- Fix/clean up __switch_to()'s broken but accidentally working handling
of FPU switching - which also generates better code
- Propagate more RIP-relative addressing in assembly code, to generate
slightly better code
- Rework the CPU mitigations Kconfig space to be less idiosyncratic, to
make it easier for distros to follow & maintain these options
- Rework the x86 idle code to cure RCU violations and to clean up the
logic
- Clean up the vDSO Makefile logic
- Misc cleanups and fixes
* tag 'x86-core-2024-03-11' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (52 commits)
x86/idle: Select idle routine only once
x86/idle: Let prefer_mwait_c1_over_halt() return bool
x86/idle: Cleanup idle_setup()
x86/idle: Clean up idle selection
x86/idle: Sanitize X86_BUG_AMD_E400 handling
sched/idle: Conditionally handle tick broadcast in default_idle_call()
x86: Increase brk randomness entropy for 64-bit systems
x86/vdso: Move vDSO to mmap region
x86/vdso/kbuild: Group non-standard build attributes and primary object file rules together
x86/vdso: Fix rethunk patching for vdso-image-{32,64}.o
x86/retpoline: Ensure default return thunk isn't used at runtime
x86/vdso: Use CONFIG_COMPAT_32 to specify vdso32
x86/vdso: Use $(addprefix ) instead of $(foreach )
x86/vdso: Simplify obj-y addition
x86/vdso: Consolidate targets and clean-files
x86/bugs: Rename CONFIG_RETHUNK => CONFIG_MITIGATION_RETHUNK
x86/bugs: Rename CONFIG_CPU_SRSO => CONFIG_MITIGATION_SRSO
x86/bugs: Rename CONFIG_CPU_IBRS_ENTRY => CONFIG_MITIGATION_IBRS_ENTRY
x86/bugs: Rename CONFIG_CPU_UNRET_ENTRY => CONFIG_MITIGATION_UNRET_ENTRY
x86/bugs: Rename CONFIG_SLS => CONFIG_MITIGATION_SLS
...
160 lines
4.2 KiB
C
160 lines
4.2 KiB
C
#ifndef _ASM_X86_DISABLED_FEATURES_H
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#define _ASM_X86_DISABLED_FEATURES_H
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/* These features, although they might be available in a CPU
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* will not be used because the compile options to support
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* them are not present.
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*
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* This code allows them to be checked and disabled at
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* compile time without an explicit #ifdef. Use
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* cpu_feature_enabled().
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*/
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#ifdef CONFIG_X86_UMIP
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# define DISABLE_UMIP 0
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#else
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# define DISABLE_UMIP (1<<(X86_FEATURE_UMIP & 31))
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#endif
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#ifdef CONFIG_X86_64
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# define DISABLE_VME (1<<(X86_FEATURE_VME & 31))
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# define DISABLE_K6_MTRR (1<<(X86_FEATURE_K6_MTRR & 31))
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# define DISABLE_CYRIX_ARR (1<<(X86_FEATURE_CYRIX_ARR & 31))
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# define DISABLE_CENTAUR_MCR (1<<(X86_FEATURE_CENTAUR_MCR & 31))
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# define DISABLE_PCID 0
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#else
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# define DISABLE_VME 0
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# define DISABLE_K6_MTRR 0
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# define DISABLE_CYRIX_ARR 0
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# define DISABLE_CENTAUR_MCR 0
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# define DISABLE_PCID (1<<(X86_FEATURE_PCID & 31))
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#endif /* CONFIG_X86_64 */
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#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
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# define DISABLE_PKU 0
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# define DISABLE_OSPKE 0
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#else
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# define DISABLE_PKU (1<<(X86_FEATURE_PKU & 31))
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# define DISABLE_OSPKE (1<<(X86_FEATURE_OSPKE & 31))
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#endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
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#ifdef CONFIG_X86_5LEVEL
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# define DISABLE_LA57 0
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#else
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# define DISABLE_LA57 (1<<(X86_FEATURE_LA57 & 31))
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#endif
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#ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION
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# define DISABLE_PTI 0
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#else
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# define DISABLE_PTI (1 << (X86_FEATURE_PTI & 31))
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#endif
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#ifdef CONFIG_MITIGATION_RETPOLINE
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# define DISABLE_RETPOLINE 0
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#else
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# define DISABLE_RETPOLINE ((1 << (X86_FEATURE_RETPOLINE & 31)) | \
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(1 << (X86_FEATURE_RETPOLINE_LFENCE & 31)))
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#endif
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#ifdef CONFIG_MITIGATION_RETHUNK
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# define DISABLE_RETHUNK 0
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#else
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# define DISABLE_RETHUNK (1 << (X86_FEATURE_RETHUNK & 31))
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#endif
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#ifdef CONFIG_MITIGATION_UNRET_ENTRY
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# define DISABLE_UNRET 0
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#else
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# define DISABLE_UNRET (1 << (X86_FEATURE_UNRET & 31))
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#endif
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#ifdef CONFIG_MITIGATION_CALL_DEPTH_TRACKING
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# define DISABLE_CALL_DEPTH_TRACKING 0
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#else
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# define DISABLE_CALL_DEPTH_TRACKING (1 << (X86_FEATURE_CALL_DEPTH & 31))
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#endif
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#ifdef CONFIG_ADDRESS_MASKING
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# define DISABLE_LAM 0
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#else
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# define DISABLE_LAM (1 << (X86_FEATURE_LAM & 31))
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#endif
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#ifdef CONFIG_INTEL_IOMMU_SVM
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# define DISABLE_ENQCMD 0
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#else
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# define DISABLE_ENQCMD (1 << (X86_FEATURE_ENQCMD & 31))
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#endif
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#ifdef CONFIG_X86_SGX
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# define DISABLE_SGX 0
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#else
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# define DISABLE_SGX (1 << (X86_FEATURE_SGX & 31))
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#endif
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#ifdef CONFIG_XEN_PV
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# define DISABLE_XENPV 0
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#else
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# define DISABLE_XENPV (1 << (X86_FEATURE_XENPV & 31))
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#endif
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#ifdef CONFIG_INTEL_TDX_GUEST
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# define DISABLE_TDX_GUEST 0
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#else
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# define DISABLE_TDX_GUEST (1 << (X86_FEATURE_TDX_GUEST & 31))
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#endif
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#ifdef CONFIG_X86_USER_SHADOW_STACK
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#define DISABLE_USER_SHSTK 0
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#else
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#define DISABLE_USER_SHSTK (1 << (X86_FEATURE_USER_SHSTK & 31))
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#endif
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#ifdef CONFIG_X86_KERNEL_IBT
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#define DISABLE_IBT 0
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#else
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#define DISABLE_IBT (1 << (X86_FEATURE_IBT & 31))
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#endif
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#ifdef CONFIG_X86_FRED
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# define DISABLE_FRED 0
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#else
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# define DISABLE_FRED (1 << (X86_FEATURE_FRED & 31))
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#endif
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#ifdef CONFIG_KVM_AMD_SEV
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#define DISABLE_SEV_SNP 0
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#else
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#define DISABLE_SEV_SNP (1 << (X86_FEATURE_SEV_SNP & 31))
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#endif
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/*
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* Make sure to add features to the correct mask
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*/
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#define DISABLED_MASK0 (DISABLE_VME)
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#define DISABLED_MASK1 0
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#define DISABLED_MASK2 0
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#define DISABLED_MASK3 (DISABLE_CYRIX_ARR|DISABLE_CENTAUR_MCR|DISABLE_K6_MTRR)
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#define DISABLED_MASK4 (DISABLE_PCID)
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#define DISABLED_MASK5 0
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#define DISABLED_MASK6 0
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#define DISABLED_MASK7 (DISABLE_PTI)
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#define DISABLED_MASK8 (DISABLE_XENPV|DISABLE_TDX_GUEST)
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#define DISABLED_MASK9 (DISABLE_SGX)
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#define DISABLED_MASK10 0
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#define DISABLED_MASK11 (DISABLE_RETPOLINE|DISABLE_RETHUNK|DISABLE_UNRET| \
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DISABLE_CALL_DEPTH_TRACKING|DISABLE_USER_SHSTK)
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#define DISABLED_MASK12 (DISABLE_FRED|DISABLE_LAM)
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#define DISABLED_MASK13 0
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#define DISABLED_MASK14 0
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#define DISABLED_MASK15 0
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#define DISABLED_MASK16 (DISABLE_PKU|DISABLE_OSPKE|DISABLE_LA57|DISABLE_UMIP| \
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DISABLE_ENQCMD)
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#define DISABLED_MASK17 0
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#define DISABLED_MASK18 (DISABLE_IBT)
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#define DISABLED_MASK19 (DISABLE_SEV_SNP)
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#define DISABLED_MASK20 0
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#define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 21)
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#endif /* _ASM_X86_DISABLED_FEATURES_H */
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