5e335add0b
[Why] Unintentionally introduced behaviour change from previous refactor, which causes clks to be 0 in no stream cases, which will cause divide by 0. [How] Skip calculation of clocks when no stream. Which is the same as old behaviour. Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <tong.cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
145 lines
4.9 KiB
C
145 lines
4.9 KiB
C
/*
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* Copyright 2017 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#ifndef __DC_RESOURCE_DCN20_H__
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#define __DC_RESOURCE_DCN20_H__
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#include "core_types.h"
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#define TO_DCN20_RES_POOL(pool)\
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container_of(pool, struct dcn20_resource_pool, base)
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struct dc;
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struct resource_pool;
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struct _vcs_dpi_display_pipe_params_st;
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struct dcn20_resource_pool {
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struct resource_pool base;
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};
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struct resource_pool *dcn20_create_resource_pool(
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const struct dc_init_data *init_data,
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struct dc *dc);
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struct link_encoder *dcn20_link_encoder_create(
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const struct encoder_init_data *enc_init_data);
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unsigned int dcn20_calc_max_scaled_time(
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unsigned int time_per_pixel,
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enum mmhubbub_wbif_mode mode,
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unsigned int urgent_watermark);
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int dcn20_populate_dml_pipes_from_context(
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struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes);
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struct pipe_ctx *dcn20_acquire_idle_pipe_for_layer(
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struct dc_state *state,
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const struct resource_pool *pool,
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struct dc_stream_state *stream);
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void dcn20_populate_dml_writeback_from_context(
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struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes);
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struct stream_encoder *dcn20_stream_encoder_create(
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enum engine_id eng_id,
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struct dc_context *ctx);
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struct dce_hwseq *dcn20_hwseq_create(
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struct dc_context *ctx);
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bool dcn20_get_dcc_compression_cap(const struct dc *dc,
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const struct dc_dcc_surface_param *input,
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struct dc_surface_dcc_cap *output);
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void dcn20_dpp_destroy(struct dpp **dpp);
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struct dpp *dcn20_dpp_create(
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struct dc_context *ctx,
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uint32_t inst);
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struct input_pixel_processor *dcn20_ipp_create(
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struct dc_context *ctx, uint32_t inst);
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struct output_pixel_processor *dcn20_opp_create(
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struct dc_context *ctx, uint32_t inst);
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struct dce_aux *dcn20_aux_engine_create(
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struct dc_context *ctx, uint32_t inst);
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struct dce_i2c_hw *dcn20_i2c_hw_create(
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struct dc_context *ctx,
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uint32_t inst);
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void dcn20_clock_source_destroy(struct clock_source **clk_src);
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struct display_stream_compressor *dcn20_dsc_create(
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struct dc_context *ctx, uint32_t inst);
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void dcn20_dsc_destroy(struct display_stream_compressor **dsc);
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struct pp_smu_funcs *dcn20_pp_smu_create(struct dc_context *ctx);
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void dcn20_pp_smu_destroy(struct pp_smu_funcs **pp_smu);
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struct hubp *dcn20_hubp_create(
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struct dc_context *ctx,
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uint32_t inst);
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struct timing_generator *dcn20_timing_generator_create(
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struct dc_context *ctx,
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uint32_t instance);
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struct mpc *dcn20_mpc_create(struct dc_context *ctx);
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struct hubbub *dcn20_hubbub_create(struct dc_context *ctx);
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bool dcn20_dwbc_create(struct dc_context *ctx, struct resource_pool *pool);
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bool dcn20_mmhubbub_create(struct dc_context *ctx, struct resource_pool *pool);
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void dcn20_set_mcif_arb_params(
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struct dc *dc,
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struct dc_state *context,
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display_e2e_pipe_params_st *pipes,
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int pipe_cnt);
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bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context, bool fast_validate);
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bool dcn20_fast_validate_bw(
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struct dc *dc,
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struct dc_state *context,
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display_e2e_pipe_params_st *pipes,
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int *pipe_cnt_out,
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int *pipe_split_from,
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int *vlevel_out);
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void dcn20_calculate_dlg_params(
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struct dc *dc, struct dc_state *context,
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display_e2e_pipe_params_st *pipes,
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int pipe_cnt,
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int vlevel);
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enum dc_status dcn20_build_mapped_resource(const struct dc *dc, struct dc_state *context, struct dc_stream_state *stream);
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enum dc_status dcn20_add_stream_to_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream);
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enum dc_status dcn20_remove_stream_from_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream);
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enum dc_status dcn20_get_default_swizzle_mode(struct dc_plane_state *plane_state);
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void dcn20_patch_bounding_box(
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struct dc *dc,
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struct _vcs_dpi_soc_bounding_box_st *bb);
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void dcn20_cap_soc_clocks(
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struct _vcs_dpi_soc_bounding_box_st *bb,
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struct pp_smu_nv_clock_table max_clocks);
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#endif /* __DC_RESOURCE_DCN20_H__ */
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