Bing Guo 1fc31638eb drm/amd/display: Fix bpc calculation for specific encodings ... [Why] 1. YCbCr 4:2:2 8bpc/10bpc modes are blocked for HDMI by policy 2. A YCbCr 4:2:0 calculation error blocked some 4:2:0 timing modes [How] YCbCr 4:2:2 8bpc/10bpc modes are allowed for HDMI Fix YCbCr 4:2:0 calculation error Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Bing Guo <Bing.Guo@amd.com> Reviewed-by: Chris Park <chris.park@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2021-11-03 12:32:34 -04:00
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display_mode_vba_30.c	drm/amd/display: Fix bpc calculation for specific encodings	2021-11-03 12:32:34 -04:00
display_mode_vba_30.h	drm/amd/display: Add DCN3 DML	2020-07-01 01:59:14 -04:00
display_rq_dlg_calc_30.c	drm/amd/display: Fix rest of pass-by-value structs in DML	2021-09-23 15:17:30 -04:00
display_rq_dlg_calc_30.h	drm/amd/display: Pass display_pipe_params_st as const in DML	2021-09-23 15:17:29 -04:00