5e616ad216
mt76 core uses ffs() to find the next free bit. This works well for 32 bit architectures where BITS_PER_LONG is 32. ffs only checks 32 bit values, so allocation fails on 64 bit architectures. Additionally, the wcid mask array was too small in cases where the array was not a multiple of BITS_PER_LONG. Fix this by making the wcid mask array u32 instead and use DIV_ROUND_UP for the size, just in case we ever bump it to a value that's not a multiple of 32. Reported-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
48 lines
1,001 B
C
48 lines
1,001 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
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* Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
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*/
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#ifndef __MT76_UTIL_H
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#define __MT76_UTIL_H
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#include <linux/skbuff.h>
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#include <linux/bitops.h>
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#include <linux/bitfield.h>
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#define MT76_INCR(_var, _size) \
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(_var = (((_var) + 1) % (_size)))
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int mt76_wcid_alloc(u32 *mask, int size);
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static inline bool
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mt76_wcid_mask_test(u32 *mask, int idx)
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{
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return mask[idx / 32] & BIT(idx % 32);
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}
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static inline void
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mt76_wcid_mask_set(u32 *mask, int idx)
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{
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mask[idx / 32] |= BIT(idx % 32);
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}
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static inline void
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mt76_wcid_mask_clear(u32 *mask, int idx)
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{
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mask[idx / 32] &= ~BIT(idx % 32);
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}
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static inline void
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mt76_skb_set_moredata(struct sk_buff *skb, bool enable)
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{
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struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
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if (enable)
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hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA);
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else
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hdr->frame_control &= ~cpu_to_le16(IEEE80211_FCTL_MOREDATA);
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}
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#endif
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