d74169ceb0
The Intel IOMMU code currently tries to allocate all DMAR fault interrupt vectors on the boot cpu. On large systems with high DMAR counts this results in vector exhaustion, and most of the vectors are not initially allocated socket local. Instead, have a cpu on each node do the vector allocation for the DMARs on that node. The boot cpu still does the allocation for its node during its boot sequence. Signed-off-by: Dimitri Sivanich <sivanich@hpe.com> Reviewed-by: Kevin Tian <kevin.tian@intel.com> Link: https://lore.kernel.org/r/Zfydpp2Hm+as16TY@hpe.com Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
164 lines
3.4 KiB
C
164 lines
3.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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#include <linux/cpumask.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/errno.h>
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#include <linux/msi.h>
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#include <linux/irq.h>
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#include <linux/pci.h>
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#include <linux/irqdomain.h>
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#include <asm/hw_irq.h>
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#include <asm/irq_remapping.h>
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#include <asm/processor.h>
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#include <asm/x86_init.h>
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#include <asm/apic.h>
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#include <asm/hpet.h>
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#include "irq_remapping.h"
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int irq_remapping_enabled;
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int irq_remap_broken;
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int disable_sourceid_checking;
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int no_x2apic_optout;
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int disable_irq_post = 0;
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static int disable_irq_remap;
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static struct irq_remap_ops *remap_ops;
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static void irq_remapping_restore_boot_irq_mode(void)
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{
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/*
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* With interrupt-remapping, for now we will use virtual wire A
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* mode, as virtual wire B is little complex (need to configure
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* both IOAPIC RTE as well as interrupt-remapping table entry).
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* As this gets called during crash dump, keep this simple for
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* now.
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*/
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if (boot_cpu_has(X86_FEATURE_APIC) || apic_from_smp_config())
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disconnect_bsp_APIC(0);
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}
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static void __init irq_remapping_modify_x86_ops(void)
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{
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x86_apic_ops.restore = irq_remapping_restore_boot_irq_mode;
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}
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static __init int setup_nointremap(char *str)
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{
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disable_irq_remap = 1;
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return 0;
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}
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early_param("nointremap", setup_nointremap);
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static __init int setup_irqremap(char *str)
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{
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if (!str)
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return -EINVAL;
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while (*str) {
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if (!strncmp(str, "on", 2)) {
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disable_irq_remap = 0;
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disable_irq_post = 0;
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} else if (!strncmp(str, "off", 3)) {
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disable_irq_remap = 1;
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disable_irq_post = 1;
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} else if (!strncmp(str, "nosid", 5))
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disable_sourceid_checking = 1;
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else if (!strncmp(str, "no_x2apic_optout", 16))
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no_x2apic_optout = 1;
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else if (!strncmp(str, "nopost", 6))
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disable_irq_post = 1;
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str += strcspn(str, ",");
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while (*str == ',')
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str++;
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}
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return 0;
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}
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early_param("intremap", setup_irqremap);
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void set_irq_remapping_broken(void)
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{
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irq_remap_broken = 1;
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}
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bool irq_remapping_cap(enum irq_remap_cap cap)
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{
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if (!remap_ops || disable_irq_post)
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return false;
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return (remap_ops->capability & (1 << cap));
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}
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EXPORT_SYMBOL_GPL(irq_remapping_cap);
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int __init irq_remapping_prepare(void)
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{
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if (disable_irq_remap)
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return -ENOSYS;
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if (IS_ENABLED(CONFIG_INTEL_IOMMU) &&
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intel_irq_remap_ops.prepare() == 0)
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remap_ops = &intel_irq_remap_ops;
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else if (IS_ENABLED(CONFIG_AMD_IOMMU) &&
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amd_iommu_irq_ops.prepare() == 0)
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remap_ops = &amd_iommu_irq_ops;
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else if (IS_ENABLED(CONFIG_HYPERV_IOMMU) &&
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hyperv_irq_remap_ops.prepare() == 0)
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remap_ops = &hyperv_irq_remap_ops;
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else
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return -ENOSYS;
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return 0;
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}
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int __init irq_remapping_enable(void)
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{
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int ret;
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if (!remap_ops->enable)
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return -ENODEV;
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ret = remap_ops->enable();
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if (irq_remapping_enabled)
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irq_remapping_modify_x86_ops();
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return ret;
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}
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void irq_remapping_disable(void)
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{
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if (irq_remapping_enabled && remap_ops->disable)
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remap_ops->disable();
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}
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int irq_remapping_reenable(int mode)
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{
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if (irq_remapping_enabled && remap_ops->reenable)
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return remap_ops->reenable(mode);
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return 0;
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}
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int __init irq_remap_enable_fault_handling(void)
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{
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if (!irq_remapping_enabled)
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return 0;
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if (!remap_ops->enable_faulting)
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return -ENODEV;
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cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "dmar:enable_fault_handling",
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remap_ops->enable_faulting, NULL);
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return remap_ops->enable_faulting(smp_processor_id());
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}
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void panic_if_irq_remap(const char *msg)
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{
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if (irq_remapping_enabled)
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panic(msg);
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}
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