a500528fb3
This patch adds bindings for LPDDR4 and LPDDR5 memory analogous to the existing bindings for LPDDR2 and LPDDR3. For now, the new types are only needed for topology description, so other properties like timing parameters are omitted. They can be added later if needed. Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220930220606.303395-3-jwerner@chromium.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
46 lines
1 KiB
YAML
46 lines
1 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr5.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: LPDDR5 SDRAM compliant to JEDEC JESD209-5
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maintainers:
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- Krzysztof Kozlowski <krzk@kernel.org>
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allOf:
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- $ref: jedec,lpddr-props.yaml#
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properties:
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compatible:
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items:
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- pattern: "^lpddr5-[0-9a-f]{2},[0-9a-f]{4}$"
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- const: jedec,lpddr5
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serial-id:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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description:
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Serial IDs read from Mode Registers 47 through 54. One byte per uint32
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cell (i.e. <MR47 MR48 MR49 MR50 MR51 MR52 MR53 MR54>).
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maxItems: 8
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items:
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minimum: 0
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maximum: 255
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required:
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- compatible
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- density
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- io-width
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unevaluatedProperties: false
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examples:
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- |
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lpddr {
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compatible = "lpddr5-01,0200", "jedec,lpddr5";
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density = <8192>;
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io-width = <8>;
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revision-id = <2 0>;
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serial-id = <3 1 0 0 0 0 0 0>;
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};
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