bf64f7fe15
My kernel robot reports build error from drivers/iio/adc/da9150-gpadc.c,
drivers/iio/adc/da9150-gpadc.c:254:13: error: ‘DA9150_GPADC_CHAN_0x08’
undeclared here (not in a function); did you mean ‘DA9150_GPADC_CHAN_TBAT’?
254 | .channel = DA9150_GPADC_CHAN_##_id,
We define GPIOD in rb.h, in fact it should only be used in gpio.c, but
it affects the driver da9150-gpadc.c which goes against the original
intention of the design, just move it to its scope.
Fixes: 1b432840d0 ("MIPS: RB532: GPIO register offsets are relative to GPIOBASE")
Suggested-by: Jonathan Cameron <jic23@kernel.org>
Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reported-by: k2ci <kernel-bot@kylinos.cn>
Signed-off-by: Jackie Liu <liuyun01@kylinos.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
64 lines
1.4 KiB
C
64 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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*
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* Copyright (C) 2004 IDT Inc.
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* Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
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*/
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#ifndef __ASM_RC32434_RB_H
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#define __ASM_RC32434_RB_H
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#define REGBASE 0x18000000
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#define IDT434_REG_BASE ((volatile void *) KSEG1ADDR(REGBASE))
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#define UART0BASE 0x58000
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#define RST (1 << 15)
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#define DEV0BASE 0x010000
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#define DEV0MASK 0x010004
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#define DEV0C 0x010008
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#define DEV0T 0x01000C
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#define DEV1BASE 0x010010
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#define DEV1MASK 0x010014
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#define DEV1C 0x010018
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#define DEV1TC 0x01001C
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#define DEV2BASE 0x010020
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#define DEV2MASK 0x010024
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#define DEV2C 0x010028
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#define DEV2TC 0x01002C
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#define DEV3BASE 0x010030
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#define DEV3MASK 0x010034
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#define DEV3C 0x010038
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#define DEV3TC 0x01003C
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#define BTCS 0x010040
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#define BTCOMPARE 0x010044
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#define LO_WPX (1 << 0)
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#define LO_ALE (1 << 1)
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#define LO_CLE (1 << 2)
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#define LO_CEX (1 << 3)
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#define LO_FOFF (1 << 5)
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#define LO_SPICS (1 << 6)
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#define LO_ULED (1 << 7)
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#define BIT_TO_MASK(x) (1 << x)
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struct dev_reg {
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u32 base;
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u32 mask;
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u32 ctl;
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u32 timing;
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};
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struct korina_device {
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char *name;
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unsigned char mac[6];
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struct net_device *dev;
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};
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struct mpmc_device {
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unsigned char state;
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spinlock_t lock;
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void __iomem *base;
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};
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extern void set_latch_u5(unsigned char or_mask, unsigned char nand_mask);
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extern unsigned char get_latch_u5(void);
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#endif /* __ASM_RC32434_RB_H */
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