Lad Prabhakar fc5d2b222a riscv: dts: renesas: rzfive-smarc-som: Drop deleting interrupt properties from ETH0/1 nodes ... Now that we have enabled IRQC support for RZ/Five SoC switch to interrupt mode for ethernet0/1 PHYs instead of polling mode. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20240403203503.634465-6-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>		2024-04-22 09:45:19 +02:00
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Makefile	riscv: dts: renesas: Add minimal DTS for Renesas RZ/Five SMARC EVK	2022-11-10 16:36:34 +01:00
r9a07g043f.dtsi	riscv: dts: renesas: r9a07g043f: Add IRQC node to RZ/Five SoC DTSI	2024-04-22 09:45:19 +02:00
r9a07g043f01-smarc.dts	riscv: dts: renesas: Add minimal DTS for Renesas RZ/Five SMARC EVK	2022-11-10 16:36:34 +01:00
rzfive-smarc-som.dtsi	riscv: dts: renesas: rzfive-smarc-som: Drop deleting interrupt properties from ETH0/1 nodes	2024-04-22 09:45:19 +02:00
rzfive-smarc.dtsi	riscv: dts: renesas: rzfive-smarc: Enable the blocks which were explicitly disabled	2023-10-05 14:25:00 +02:00