a0a8d15a79
The TDX guest platform takes one bit from the physical address to
indicate if the page is shared (accessible by VMM). This bit is not part
of the physical_mask and is not preserved during mprotect(). As a
result, the 'shared' bit is lost during mprotect() on shared mappings.
_COMMON_PAGE_CHG_MASK specifies which PTE bits need to be preserved
during modification. AMD includes 'sme_me_mask' in the define to
preserve the 'encrypt' bit.
To cover both Intel and AMD cases, include 'cc_mask' in
_COMMON_PAGE_CHG_MASK instead of 'sme_me_mask'.
Reported-and-tested-by: Chris Oo <cho@microsoft.com>
Fixes: 41394e33f3 ("x86/tdx: Extend the confidential computing API to support TDX guests")
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Rick Edgecombe <rick.p.edgecombe@intel.com>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/all/20240424082035.4092071-1-kirill.shutemov%40linux.intel.com
42 lines
703 B
C
42 lines
703 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_COCO_H
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#define _ASM_X86_COCO_H
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#include <asm/asm.h>
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#include <asm/types.h>
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enum cc_vendor {
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CC_VENDOR_NONE,
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CC_VENDOR_AMD,
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CC_VENDOR_INTEL,
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};
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#ifdef CONFIG_ARCH_HAS_CC_PLATFORM
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extern enum cc_vendor cc_vendor;
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extern u64 cc_mask;
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static inline void cc_set_mask(u64 mask)
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{
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RIP_REL_REF(cc_mask) = mask;
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}
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u64 cc_mkenc(u64 val);
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u64 cc_mkdec(u64 val);
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void cc_random_init(void);
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#else
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#define cc_vendor (CC_VENDOR_NONE)
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static const u64 cc_mask = 0;
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static inline u64 cc_mkenc(u64 val)
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{
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return val;
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}
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static inline u64 cc_mkdec(u64 val)
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{
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return val;
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}
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static inline void cc_random_init(void) { }
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#endif
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#endif /* _ASM_X86_COCO_H */
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