94af3a04e3
Optimize virt_spin_lock() to use simpler and faster: atomic_try_cmpxchg(*ptr, &val, new) instead of: atomic_cmpxchg(*ptr, val, new) == val The x86 CMPXCHG instruction returns success in the ZF flag, so this change saves a compare after the CMPXCHG. Also optimize retry loop a bit. atomic_try_cmpxchg() fails iff &lock->val != 0, so there is no need to load and compare the lock value again - cpu_relax() can be unconditinally called in this case. This allows us to generate optimized: 1f: ba 01 00 00 00 mov $0x1,%edx 24: 8b 03 mov (%rbx),%eax 26: 85 c0 test %eax,%eax 28: 75 63 jne 8d <...> 2a: f0 0f b1 13 lock cmpxchg %edx,(%rbx) 2e: 75 5d jne 8d <...> ... 8d: f3 90 pause 8f: eb 93 jmp 24 <...> instead of: 1f: ba 01 00 00 00 mov $0x1,%edx 24: 8b 03 mov (%rbx),%eax 26: 85 c0 test %eax,%eax 28: 75 13 jne 3d <...> 2a: f0 0f b1 13 lock cmpxchg %edx,(%rbx) 2e: 85 c0 test %eax,%eax 30: 75 f2 jne 24 <...> ... 3d: f3 90 pause 3f: eb e3 jmp 24 <...> Signed-off-by: Uros Bizjak <ubizjak@gmail.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Cc: Waiman Long <longman@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Link: https://lore.kernel.org/r/20240422120054.199092-1-ubizjak@gmail.com
114 lines
3 KiB
C
114 lines
3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_QSPINLOCK_H
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#define _ASM_X86_QSPINLOCK_H
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#include <linux/jump_label.h>
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#include <asm/cpufeature.h>
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#include <asm-generic/qspinlock_types.h>
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#include <asm/paravirt.h>
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#include <asm/rmwcc.h>
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#define _Q_PENDING_LOOPS (1 << 9)
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#define queued_fetch_set_pending_acquire queued_fetch_set_pending_acquire
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static __always_inline u32 queued_fetch_set_pending_acquire(struct qspinlock *lock)
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{
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u32 val;
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/*
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* We can't use GEN_BINARY_RMWcc() inside an if() stmt because asm goto
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* and CONFIG_PROFILE_ALL_BRANCHES=y results in a label inside a
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* statement expression, which GCC doesn't like.
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*/
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val = GEN_BINARY_RMWcc(LOCK_PREFIX "btsl", lock->val.counter, c,
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"I", _Q_PENDING_OFFSET) * _Q_PENDING_VAL;
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val |= atomic_read(&lock->val) & ~_Q_PENDING_MASK;
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return val;
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}
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#ifdef CONFIG_PARAVIRT_SPINLOCKS
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extern void native_queued_spin_lock_slowpath(struct qspinlock *lock, u32 val);
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extern void __pv_init_lock_hash(void);
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extern void __pv_queued_spin_lock_slowpath(struct qspinlock *lock, u32 val);
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extern void __raw_callee_save___pv_queued_spin_unlock(struct qspinlock *lock);
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extern bool nopvspin;
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#define queued_spin_unlock queued_spin_unlock
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/**
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* queued_spin_unlock - release a queued spinlock
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* @lock : Pointer to queued spinlock structure
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*
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* A smp_store_release() on the least-significant byte.
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*/
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static inline void native_queued_spin_unlock(struct qspinlock *lock)
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{
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smp_store_release(&lock->locked, 0);
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}
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static inline void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val)
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{
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pv_queued_spin_lock_slowpath(lock, val);
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}
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static inline void queued_spin_unlock(struct qspinlock *lock)
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{
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kcsan_release();
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pv_queued_spin_unlock(lock);
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}
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#define vcpu_is_preempted vcpu_is_preempted
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static inline bool vcpu_is_preempted(long cpu)
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{
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return pv_vcpu_is_preempted(cpu);
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}
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#endif
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#ifdef CONFIG_PARAVIRT
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/*
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* virt_spin_lock_key - enables (by default) the virt_spin_lock() hijack.
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*
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* Native (and PV wanting native due to vCPU pinning) should disable this key.
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* It is done in this backwards fashion to only have a single direction change,
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* which removes ordering between native_pv_spin_init() and HV setup.
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*/
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DECLARE_STATIC_KEY_TRUE(virt_spin_lock_key);
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/*
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* Shortcut for the queued_spin_lock_slowpath() function that allows
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* virt to hijack it.
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*
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* Returns:
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* true - lock has been negotiated, all done;
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* false - queued_spin_lock_slowpath() will do its thing.
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*/
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#define virt_spin_lock virt_spin_lock
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static inline bool virt_spin_lock(struct qspinlock *lock)
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{
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int val;
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if (!static_branch_likely(&virt_spin_lock_key))
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return false;
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/*
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* On hypervisors without PARAVIRT_SPINLOCKS support we fall
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* back to a Test-and-Set spinlock, because fair locks have
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* horrible lock 'holder' preemption issues.
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*/
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__retry:
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val = atomic_read(&lock->val);
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if (val || !atomic_try_cmpxchg(&lock->val, &val, _Q_LOCKED_VAL)) {
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cpu_relax();
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goto __retry;
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}
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return true;
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}
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#endif /* CONFIG_PARAVIRT */
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#include <asm-generic/qspinlock.h>
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#endif /* _ASM_X86_QSPINLOCK_H */
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