Commit77acc6b55a
("riscv: add support for kernel-mode FPU") and commita28e4b672f
("drm/amd/display: use ARCH_HAS_KERNEL_FPU_SUPPORT") enabled support for CONFIG_DRM_AMD_DC_FP with RISC-V. Unfortunately, this exposed -Wframe-larger-than warnings (which become fatal with CONFIG_WERROR=y) when building ARCH=riscv allmodconfig with clang: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c:58:13: error: stack frame size (2448) exceeds limit (2048) in 'DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation' [-Werror,-Wframe-larger-than] 58 | static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation( | ^ 1 error generated. Many functions in this file use a large number of parameters, which must be passed on the stack at a certain pointer due to register exhaustion, which can cause high stack usage when inlining and issues with stack slot analysis get involved. While the compiler can and should do better (as GCC uses less than half the amount of stack space for the same function), it is not as simple as a fix as adjusting the functions not to take a large number of parameters. Unfortunately, modifying these files to avoid the problem is a difficult to justify approach because any revisions to the files in the kernel tree never make it back to the original source (so copies of the code for newer hardware revisions just reintroduce the issue) and the files are hard to read/modify due to being "gcc-parsable HW gospel, coming straight from HW engineers". Avoid building the problematic code for RISC-V by modifying the existing condition for arm64 that exists for the same reason. Factor out the logical not to make the condition a little more readable naturally. Fixes:a28e4b672f
("drm/amd/display: use ARCH_HAS_KERNEL_FPU_SUPPORT") Reported-by: Palmer Dabbelt <palmer@rivosinc.com> Closes: https://lore.kernel.org/20240530145741.7506-2-palmer@rivosinc.com/ Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
54 lines
1.8 KiB
Text
54 lines
1.8 KiB
Text
# SPDX-License-Identifier: MIT
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menu "Display Engine Configuration"
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depends on DRM && DRM_AMDGPU
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config DRM_AMD_DC
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bool "AMD DC - Enable new display engine"
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default y
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depends on BROKEN || !CC_IS_CLANG || ARM64 || RISCV || SPARC64 || X86_64
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select SND_HDA_COMPONENT if SND_HDA_CORE
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# !CC_IS_CLANG: https://github.com/ClangBuiltLinux/linux/issues/1752
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select DRM_AMD_DC_FP if ARCH_HAS_KERNEL_FPU_SUPPORT && !(CC_IS_CLANG && (ARM64 || RISCV))
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help
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Choose this option if you want to use the new display engine
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support for AMDGPU. This adds required support for Vega and
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Raven ASICs.
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calculate_bandwidth() is presently broken on all !(X86_64 || SPARC64 || ARM64)
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architectures built with Clang (all released versions), whereby the stack
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frame gets blown up to well over 5k. This would cause an immediate kernel
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panic on most architectures. We'll revert this when the following bug report
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has been resolved: https://github.com/llvm/llvm-project/issues/41896.
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config DRM_AMD_DC_FP
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def_bool n
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help
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Floating point support, required for DCN-based SoCs
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config DRM_AMD_DC_SI
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bool "AMD DC support for Southern Islands ASICs"
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depends on DRM_AMDGPU_SI
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depends on DRM_AMD_DC
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help
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Choose this option to enable new AMD DC support for SI asics
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by default. This includes Tahiti, Pitcairn, Cape Verde, Oland.
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Hainan is not supported by AMD DC and it has no physical DCE6.
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config DEBUG_KERNEL_DC
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bool "Enable kgdb break in DC"
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depends on DRM_AMD_DC
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depends on KGDB
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help
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Choose this option if you want to hit kdgb_break in assert.
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config DRM_AMD_SECURE_DISPLAY
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bool "Enable secure display support"
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depends on DEBUG_FS
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depends on DRM_AMD_DC_FP
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help
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Choose this option if you want to support secure display
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This option enables the calculation of crc of specific region via
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debugfs. Cooperate with specific DMCU FW.
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endmenu
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