Daniel Miess 5f70d4ff80 drm/amd/display: Enable DCN clock gating for DCN35 ... [WHY & HOW] Enable DCN clock gating for DCN35. Disable DTBCLK gate before link training and re-enable afterwards Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Daniel Miess <daniel.miess@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2023-11-17 09:30:50 -05:00
..
dce_hwseq.c	drm/amd/display: Refactor HWSS into component folder	2023-10-09 17:00:09 -04:00
dce_hwseq.h	drm/amd/display: Enable DCN clock gating for DCN35	2023-11-17 09:30:50 -05:00