0eec708ec3
Debugging PXP issues can't even begin without understanding precedding
sequence of important events. Add drm_dbg into the most important PXP
events.
v5 : - rebase.
v4 : - rebase.
v3 : - move gt_dbg to after mutex block in function
i915_gsc_proxy_component_bind. (Vivaik)
v2 : - remove __func__ since drm_dbg covers that (Jani).
- add timeout dbg of the restart from front-end (Alan).
Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Reviewed-by: Vivaik Balasubrawmanian <vivaik.balasubrawmanian@intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231122191523.58379-1-alan.previn.teres.alexis@intel.com
109 lines
2.7 KiB
C
109 lines
2.7 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright(c) 2020 Intel Corporation.
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*/
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#include <linux/workqueue.h>
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#include "gt/intel_gt_irq.h"
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#include "gt/intel_gt_regs.h"
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#include "gt/intel_gt_types.h"
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#include "i915_irq.h"
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#include "i915_reg.h"
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#include "intel_pxp.h"
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#include "intel_pxp_irq.h"
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#include "intel_pxp_session.h"
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#include "intel_pxp_types.h"
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#include "intel_runtime_pm.h"
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/**
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* intel_pxp_irq_handler - Handles PXP interrupts.
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* @pxp: pointer to pxp struct
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* @iir: interrupt vector
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*/
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void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir)
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{
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struct intel_gt *gt;
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if (GEM_WARN_ON(!intel_pxp_is_enabled(pxp)))
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return;
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gt = pxp->ctrl_gt;
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lockdep_assert_held(gt->irq_lock);
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if (unlikely(!iir))
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return;
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if (iir & (GEN12_DISPLAY_PXP_STATE_TERMINATED_INTERRUPT |
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GEN12_DISPLAY_APP_TERMINATED_PER_FW_REQ_INTERRUPT)) {
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/* immediately mark PXP as inactive on termination */
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intel_pxp_mark_termination_in_progress(pxp);
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pxp->session_events |= PXP_TERMINATION_REQUEST | PXP_INVAL_REQUIRED |
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PXP_EVENT_TYPE_IRQ;
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}
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if (iir & GEN12_DISPLAY_STATE_RESET_COMPLETE_INTERRUPT)
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pxp->session_events |= PXP_TERMINATION_COMPLETE | PXP_EVENT_TYPE_IRQ;
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if (pxp->session_events)
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queue_work(system_unbound_wq, &pxp->session_work);
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}
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static inline void __pxp_set_interrupts(struct intel_gt *gt, u32 interrupts)
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{
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struct intel_uncore *uncore = gt->uncore;
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const u32 mask = interrupts << 16;
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intel_uncore_write(uncore, GEN11_CRYPTO_RSVD_INTR_ENABLE, mask);
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intel_uncore_write(uncore, GEN11_CRYPTO_RSVD_INTR_MASK, ~mask);
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}
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static inline void pxp_irq_reset(struct intel_gt *gt)
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{
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spin_lock_irq(gt->irq_lock);
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gen11_gt_reset_one_iir(gt, 0, GEN11_KCR);
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spin_unlock_irq(gt->irq_lock);
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}
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void intel_pxp_irq_enable(struct intel_pxp *pxp)
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{
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struct intel_gt *gt = pxp->ctrl_gt;
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spin_lock_irq(gt->irq_lock);
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if (!pxp->irq_enabled)
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WARN_ON_ONCE(gen11_gt_reset_one_iir(gt, 0, GEN11_KCR));
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__pxp_set_interrupts(gt, GEN12_PXP_INTERRUPTS);
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pxp->irq_enabled = true;
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spin_unlock_irq(gt->irq_lock);
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}
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void intel_pxp_irq_disable(struct intel_pxp *pxp)
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{
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struct intel_gt *gt = pxp->ctrl_gt;
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/*
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* We always need to submit a global termination when we re-enable the
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* interrupts, so there is no need to make sure that the session state
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* makes sense at the end of this function. Just make sure this is not
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* called in a path were the driver consider the session as valid and
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* doesn't call a termination on restart.
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*/
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GEM_WARN_ON(intel_pxp_is_active(pxp));
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spin_lock_irq(gt->irq_lock);
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pxp->irq_enabled = false;
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__pxp_set_interrupts(gt, 0);
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spin_unlock_irq(gt->irq_lock);
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intel_synchronize_irq(gt->i915);
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pxp_irq_reset(gt);
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flush_work(&pxp->session_work);
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}
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