5846cdfd3d
Current vga arbiter implementation in i915 needs a re-design. The current approach would cause real problems if anyone actually needs to talk another GPU using legacy VGA resources. The main issue is that X becomes a slideshow if it thinks there are multiple GPUs that have VGA decoding enabled as it insists on adjusting the VGA routing pretty much for every little operation involving any of the GPUs. The cleanup will be planned for i915. Meanwhile to focus on Xe upstreaming and have a cleaner separation, the said functionality is being moved to a different file exclusive for i915. Xe driver will re-use rest of the display code from i915. v2: Addressed Jani Nikula's review comments. v3: Dropped a duplicate function (Jani) v4: Updated commit message with reasoning as sugested by Ville. Signed-off-by: Uma Shankar <uma.shankar@intel.com> Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230929074306.1533859-1-uma.shankar@intel.com
20 lines
574 B
C
20 lines
574 B
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2023 Intel Corporation
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*/
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#ifndef __INTEL_GMCH_H__
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#define __INTEL_GMCH_H__
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#include <linux/types.h>
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struct pci_dev;
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struct drm_i915_private;
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int intel_gmch_bridge_setup(struct drm_i915_private *i915);
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void intel_gmch_bar_setup(struct drm_i915_private *i915);
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void intel_gmch_bar_teardown(struct drm_i915_private *i915);
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int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode);
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unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode);
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#endif /* __INTEL_GMCH_H__ */
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