db8892bb1b
Patch adds support for Cadence DRD Super Speed Plus controller(CDNSP). CDNSP DRD is a part of Cadence CDNSP controller. The DRD CDNSP controller has a lot of difference on hardware level but on software level is quite compatible with CDNS3 DRD. For this reason CDNS3 DRD part of CDNS3 driver was reused for CDNSP driver. Signed-off-by: Pawel Laszczak <pawell@cadence.com> Tested-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Peter Chen <peter.chen@nxp.com>
122 lines
3.8 KiB
C
122 lines
3.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Cadence USBSS DRD Header File.
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*
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* Copyright (C) 2017-2018 NXP
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* Copyright (C) 2018-2019 Cadence.
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*
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* Authors: Peter Chen <peter.chen@nxp.com>
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* Pawel Laszczak <pawell@cadence.com>
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*/
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#include <linux/usb/otg.h>
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#include <linux/usb/role.h>
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#ifndef __LINUX_CDNS3_CORE_H
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#define __LINUX_CDNS3_CORE_H
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struct cdns3;
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/**
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* struct cdns3_role_driver - host/gadget role driver
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* @start: start this role
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* @stop: stop this role
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* @suspend: suspend callback for this role
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* @resume: resume callback for this role
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* @irq: irq handler for this role
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* @name: role name string (host/gadget)
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* @state: current state
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*/
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struct cdns3_role_driver {
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int (*start)(struct cdns3 *cdns);
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void (*stop)(struct cdns3 *cdns);
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int (*suspend)(struct cdns3 *cdns, bool do_wakeup);
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int (*resume)(struct cdns3 *cdns, bool hibernated);
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const char *name;
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#define CDNS3_ROLE_STATE_INACTIVE 0
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#define CDNS3_ROLE_STATE_ACTIVE 1
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int state;
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};
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#define CDNS3_XHCI_RESOURCES_NUM 2
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struct cdns3_platform_data {
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int (*platform_suspend)(struct device *dev,
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bool suspend, bool wakeup);
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unsigned long quirks;
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#define CDNS3_DEFAULT_PM_RUNTIME_ALLOW BIT(0)
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};
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/**
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* struct cdns3 - Representation of Cadence USB3 DRD controller.
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* @dev: pointer to Cadence device struct
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* @xhci_regs: pointer to base of xhci registers
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* @xhci_res: the resource for xhci
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* @dev_regs: pointer to base of dev registers
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* @otg_res: the resource for otg
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* @otg_v0_regs: pointer to base of v0 otg registers
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* @otg_v1_regs: pointer to base of v1 otg registers
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* @otg_cdnsp_regs: pointer to base of CDNSP otg registers
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* @otg_regs: pointer to base of otg registers
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* @otg_irq_regs: pointer to interrupt registers
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* @otg_irq: irq number for otg controller
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* @dev_irq: irq number for device controller
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* @wakeup_irq: irq number for wakeup event, it is optional
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* @roles: array of supported roles for this controller
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* @role: current role
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* @host_dev: the child host device pointer for cdns3 core
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* @gadget_dev: the child gadget device pointer for cdns3 core
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* @usb2_phy: pointer to USB2 PHY
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* @usb3_phy: pointer to USB3 PHY
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* @mutex: the mutex for concurrent code at driver
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* @dr_mode: supported mode of operation it can be only Host, only Device
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* or OTG mode that allow to switch between Device and Host mode.
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* This field based on firmware setting, kernel configuration
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* and hardware configuration.
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* @role_sw: pointer to role switch object.
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* @in_lpm: indicate the controller is in low power mode
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* @wakeup_pending: wakeup interrupt pending
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* @pdata: platform data from glue layer
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* @lock: spinlock structure
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* @xhci_plat_data: xhci private data structure pointer
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*/
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struct cdns3 {
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struct device *dev;
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void __iomem *xhci_regs;
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struct resource xhci_res[CDNS3_XHCI_RESOURCES_NUM];
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struct cdns3_usb_regs __iomem *dev_regs;
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struct resource otg_res;
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struct cdns3_otg_legacy_regs *otg_v0_regs;
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struct cdns3_otg_regs *otg_v1_regs;
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struct cdnsp_otg_regs *otg_cdnsp_regs;
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struct cdns3_otg_common_regs *otg_regs;
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struct cdns3_otg_irq_regs *otg_irq_regs;
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#define CDNS3_CONTROLLER_V0 0
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#define CDNS3_CONTROLLER_V1 1
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#define CDNSP_CONTROLLER_V2 2
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u32 version;
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bool phyrst_a_enable;
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int otg_irq;
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int dev_irq;
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int wakeup_irq;
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struct cdns3_role_driver *roles[USB_ROLE_DEVICE + 1];
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enum usb_role role;
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struct platform_device *host_dev;
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struct cdns3_device *gadget_dev;
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struct phy *usb2_phy;
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struct phy *usb3_phy;
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/* mutext used in workqueue*/
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struct mutex mutex;
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enum usb_dr_mode dr_mode;
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struct usb_role_switch *role_sw;
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bool in_lpm;
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bool wakeup_pending;
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struct cdns3_platform_data *pdata;
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spinlock_t lock;
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struct xhci_plat_priv *xhci_plat_data;
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};
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int cdns3_hw_role_switch(struct cdns3 *cdns);
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#endif /* __LINUX_CDNS3_CORE_H */
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