Tao Zhou e63fa4dcea drm/amdgpu: update algorithm of umc address conversion ... On ALDEBARAN, we need to traverse all column bits higher than BIT11(C4C3C2) in a row, the shift of R14 bit should be also taken into account. Retire all pages we find. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2022-01-27 15:49:08 -05:00
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drm	drm/amdgpu: update algorithm of umc address conversion	2022-01-27 15:49:08 -05:00
host1x	gpu: host1x: Add back arm_iommu_detach_device()	2021-12-16 14:28:51 +01:00
ipu-v3	media: i.MX6: Support 16-bit BT.1120 video input	2021-10-19 08:08:38 +01:00
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vga	vgaarb: don't pass a cookie to vga_client_register	2021-07-21 10:29:10 +02:00
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