4b5305decc
In order to remove further .fixup usage, extend the extable infrastructure to take additional information from the extable entry sites. Specifically add _ASM_EXTABLE_TYPE_REG() and EX_TYPE_IMM_REG that extend the existing _ASM_EXTABLE_TYPE() by taking an additional register argument and encoding that and an s16 immediate into the existing s32 type field. This limits the actual types to the first byte, 255 seem plenty. Also add a few flags into the type word, specifically CLEAR_AX and CLEAR_DX which clear the return and extended return register. Notes: - due to the % in our register names it's hard to make it more generally usable as arm64 did. - the s16 is far larger than used in these patches, future extentions can easily shrink this to get more bits. - without the bitfield fix this will not compile, because: 0xFF > -1 and we can't even extract the TYPE field. [nathanchance: Build fix for clang-lto builds: https://lkml.kernel.org/r/20211210234953.3420108-1-nathan@kernel.org ] Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Josh Poimboeuf <jpoimboe@redhat.com> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Tested-by: Nick Desaulniers <ndesaulniers@google.com> Link: https://lore.kernel.org/r/20211110101325.303890153@infradead.org
57 lines
1.8 KiB
C
57 lines
1.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_EXTABLE_H
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#define _ASM_X86_EXTABLE_H
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#include <asm/extable_fixup_types.h>
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/*
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* The exception table consists of two addresses relative to the
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* exception table entry itself and a type selector field.
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*
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* The first address is of an instruction that is allowed to fault, the
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* second is the target at which the program should continue.
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*
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* The type entry is used by fixup_exception() to select the handler to
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* deal with the fault caused by the instruction in the first field.
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*
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* All the routines below use bits of fixup code that are out of line
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* with the main instruction path. This means when everything is well,
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* we don't even have to jump over them. Further, they do not intrude
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* on our cache or tlb entries.
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*/
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struct exception_table_entry {
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int insn, fixup, data;
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};
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struct pt_regs;
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#define ARCH_HAS_RELATIVE_EXTABLE
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#define swap_ex_entry_fixup(a, b, tmp, delta) \
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do { \
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(a)->fixup = (b)->fixup + (delta); \
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(b)->fixup = (tmp).fixup - (delta); \
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(a)->data = (b)->data; \
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(b)->data = (tmp).data; \
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} while (0)
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extern int fixup_exception(struct pt_regs *regs, int trapnr,
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unsigned long error_code, unsigned long fault_addr);
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extern int fixup_bug(struct pt_regs *regs, int trapnr);
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extern int ex_get_fixup_type(unsigned long ip);
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extern void early_fixup_exception(struct pt_regs *regs, int trapnr);
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#ifdef CONFIG_X86_MCE
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extern void ex_handler_msr_mce(struct pt_regs *regs, bool wrmsr);
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#else
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static inline void ex_handler_msr_mce(struct pt_regs *regs, bool wrmsr) { }
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#endif
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#if defined(CONFIG_BPF_JIT) && defined(CONFIG_X86_64)
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bool ex_handler_bpf(const struct exception_table_entry *x, struct pt_regs *regs);
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#else
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static inline bool ex_handler_bpf(const struct exception_table_entry *x,
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struct pt_regs *regs) { return false; }
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#endif
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#endif
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