99bbc4ae69
PTP hardware block can be configured to utilize the external clock. Also the current ptp timestamp can be captured when external trigger is applied on a gpio pin. These features are required in scenarios like connecting a external timing device to the chip for time synchronization. The timing device provides the clock and trigger(PPS signal) to the PTP block. This patch does the following: 1. configures PTP block to use external clock frequency and timestamp capture on external event. 2. sends PTP_REQ_EXTTS events to kernel ptp phc susbsytem with captured timestamps 3. aligns PPS edge to adjusted ptp clock in the ptp device by setting the PPS_THRESH to the reminder of the last timestamp value captured by external PPS Signed-off-by: Yi Guo <yig@marvell.com> Signed-off-by: Hariprasad Kelam <hkelam@marvell.com> Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
27 lines
476 B
C
27 lines
476 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Marvell PTP driver
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*
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* Copyright (C) 2020 Marvell.
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*
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*/
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#ifndef PTP_H
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#define PTP_H
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#include <linux/timecounter.h>
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#include <linux/time64.h>
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#include <linux/spinlock.h>
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struct ptp {
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struct pci_dev *pdev;
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void __iomem *reg_base;
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u32 clock_rate;
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};
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struct ptp *ptp_get(void);
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void ptp_put(struct ptp *ptp);
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void ptp_start(struct ptp *ptp, u64 sclk, u32 ext_clk_freq, u32 extts);
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extern struct pci_driver ptp_driver;
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#endif
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