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linux/arch/arm64/boot/dts/intel
Dinh Nguyen 31354121bf arm64: dts: socfpga: Add clk-phase-sd-hs property to the sdmmc node
The sdmmc controller's CIU(Card Interface Unit) clock's phase can be
adjusted through the register in the system manager. Add the binding
"altr,sysmgr-syscon" to the SDMMC node for the driver to access the
system manager. Add the "clk-phase-sd-hs" property in the SDMMC node to
designate the smpsel and drvsel properties for the CIU clock.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-11-18 11:13:49 -06:00
..
keembay-evm.dts arm64: dts: keembay: Add device tree for Keem Bay EVM board 2020-07-17 16:32:20 +02:00
keembay-soc.dtsi arm64: dts: keembay: Add device tree for Keem Bay SoC 2020-07-17 16:32:18 +02:00
Makefile arm64: dts: intel: add device tree for n6000 2022-05-19 18:13:25 -05:00
socfpga_agilex.dtsi arm64: dts: socfpga: Add clk-phase-sd-hs property to the sdmmc node 2022-11-18 11:13:49 -06:00
socfpga_agilex_n6000.dts arm64: dts: intel: add device tree for n6000 2022-05-19 18:13:25 -05:00
socfpga_agilex_socdk.dts arm64: dts: socfpga: Add clk-phase-sd-hs property to the sdmmc node 2022-11-18 11:13:49 -06:00
socfpga_agilex_socdk_nand.dts arm64: dts: agilex: add board compatible for SoCFPGA DK 2022-02-09 10:43:03 -06:00
socfpga_n5x_socdk.dts arm64: dts: socfpga: Add clk-phase-sd-hs property to the sdmmc node 2022-11-18 11:13:49 -06:00