[WHY] Low dscclk in high vlevels blocks some DSC modes. [HOW] Update dscclk to 1/3 of dispclk. Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Stylon Wang <stylon.wang@amd.com> Signed-off-by: Michael Strauss <michael.strauss@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
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.. | ||
dcn20_fpu.c | ||
dcn20_fpu.h | ||
display_mode_vba_20.c | ||
display_mode_vba_20.h | ||
display_mode_vba_20v2.c | ||
display_mode_vba_20v2.h | ||
display_rq_dlg_calc_20.c | ||
display_rq_dlg_calc_20.h | ||
display_rq_dlg_calc_20v2.c | ||
display_rq_dlg_calc_20v2.h |