8f70f1ec58
This workaround is added for Media tile of MTL A step. It is to help pcode workaround which handles the hardware issue seen during package C2/C3 transitions due to RC6 entry/exit transitions on Media tile. As a part of workaround pcode expect kmd to send mailbox message "media busy" when components of Media tile are in use and "media idle" otherwise. As per workaround description gucrc need to be disabled so enabled host based RC for Media tile. v2: - Correct workaround id (Matt) - Fix review comments (Rodrigo) Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Badal Nilawar <badal.nilawar@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20221103184559.2306481-1-badal.nilawar@intel.com
92 lines
1.9 KiB
C
92 lines
1.9 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2021 Intel Corporation
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*/
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#include <linux/string_helpers.h>
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#include "intel_guc_rc.h"
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#include "gt/intel_gt.h"
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#include "i915_drv.h"
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static bool __guc_rc_supported(struct intel_guc *guc)
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{
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struct intel_gt *gt = guc_to_gt(guc);
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/*
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* Wa_14017073508: mtl
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* Do not enable gucrc to avoid additional interrupts which
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* may disrupt pcode wa.
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*/
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if (IS_MTL_GRAPHICS_STEP(gt->i915, P, STEP_A0, STEP_B0) &&
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gt->type == GT_MEDIA)
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return false;
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/* GuC RC is unavailable for pre-Gen12 */
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return guc->submission_supported &&
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GRAPHICS_VER(gt->i915) >= 12;
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}
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static bool __guc_rc_selected(struct intel_guc *guc)
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{
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if (!intel_guc_rc_is_supported(guc))
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return false;
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return guc->submission_selected;
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}
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void intel_guc_rc_init_early(struct intel_guc *guc)
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{
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guc->rc_supported = __guc_rc_supported(guc);
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guc->rc_selected = __guc_rc_selected(guc);
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}
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static int guc_action_control_gucrc(struct intel_guc *guc, bool enable)
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{
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u32 rc_mode = enable ? INTEL_GUCRC_FIRMWARE_CONTROL :
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INTEL_GUCRC_HOST_CONTROL;
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u32 action[] = {
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INTEL_GUC_ACTION_SETUP_PC_GUCRC,
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rc_mode
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};
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int ret;
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ret = intel_guc_send(guc, action, ARRAY_SIZE(action));
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ret = ret > 0 ? -EPROTO : ret;
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return ret;
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}
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static int __guc_rc_control(struct intel_guc *guc, bool enable)
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{
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struct intel_gt *gt = guc_to_gt(guc);
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int ret;
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if (!intel_uc_uses_guc_rc(>->uc))
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return -EOPNOTSUPP;
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if (!intel_guc_is_ready(guc))
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return -EINVAL;
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ret = guc_action_control_gucrc(guc, enable);
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if (ret) {
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i915_probe_error(guc_to_gt(guc)->i915, "Failed to %s GuC RC (%pe)\n",
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str_enable_disable(enable), ERR_PTR(ret));
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return ret;
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}
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drm_info(>->i915->drm, "GuC RC: %s\n",
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str_enabled_disabled(enable));
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return 0;
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}
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int intel_guc_rc_enable(struct intel_guc *guc)
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{
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return __guc_rc_control(guc, true);
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}
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int intel_guc_rc_disable(struct intel_guc *guc)
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{
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return __guc_rc_control(guc, false);
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}
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