8d539b84f1
The APIs that allow backtracing across CPUs have always had a way to exclude the current CPU. This convenience means callers didn't need to find a place to allocate a CPU mask just to handle the common case. Let's extend the API to take a CPU ID to exclude instead of just a boolean. This isn't any more complex for the API to handle and allows the hardlockup detector to exclude a different CPU (the one it already did a trace for) without needing to find space for a CPU mask. Arguably, this new API also encourages safer behavior. Specifically if the caller wants to avoid tracing the current CPU (maybe because they already traced the current CPU) this makes it more obvious to the caller that they need to make sure that the current CPU ID can't change. [akpm@linux-foundation.org: fix trigger_allbutcpu_cpu_backtrace() stub] Link: https://lkml.kernel.org/r/20230804065935.v4.1.Ia35521b91fc781368945161d7b28538f9996c182@changeid Signed-off-by: Douglas Anderson <dianders@chromium.org> Acked-by: Michal Hocko <mhocko@suse.com> Cc: kernel test robot <lkp@intel.com> Cc: Lecopzer Chen <lecopzer.chen@mediatek.com> Cc: Petr Mladek <pmladek@suse.com> Cc: Pingfan Liu <kernelfans@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
83 lines
2.2 KiB
C
83 lines
2.2 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1994 by Waldorf GMBH, written by Ralf Baechle
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* Copyright (C) 1995, 96, 97, 98, 99, 2000, 01, 02, 03 by Ralf Baechle
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*/
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#ifndef _ASM_IRQ_H
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#define _ASM_IRQ_H
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#include <linux/linkage.h>
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#include <linux/smp.h>
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#include <asm/mipsmtregs.h>
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#include <irq.h>
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#define IRQ_STACK_SIZE THREAD_SIZE
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#define IRQ_STACK_START (IRQ_STACK_SIZE - 16)
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extern void *irq_stack[NR_CPUS];
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/*
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* The highest address on the IRQ stack contains a dummy frame put down in
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* genex.S (handle_int & except_vec_vi_handler) which is structured as follows:
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*
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* top ------------
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* | task sp | <- irq_stack[cpu] + IRQ_STACK_START
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* ------------
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* | | <- First frame of IRQ context
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* ------------
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*
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* task sp holds a copy of the task stack pointer where the struct pt_regs
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* from exception entry can be found.
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*/
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static inline bool on_irq_stack(int cpu, unsigned long sp)
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{
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unsigned long low = (unsigned long)irq_stack[cpu];
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unsigned long high = low + IRQ_STACK_SIZE;
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return (low <= sp && sp <= high);
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}
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#ifdef CONFIG_I8259
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static inline int irq_canonicalize(int irq)
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{
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return ((irq == I8259A_IRQ_BASE + 2) ? I8259A_IRQ_BASE + 9 : irq);
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}
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#else
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#define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */
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#endif
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asmlinkage void plat_irq_dispatch(void);
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extern void do_IRQ(unsigned int irq);
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struct irq_domain;
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extern void do_domain_IRQ(struct irq_domain *domain, unsigned int irq);
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extern void arch_init_irq(void);
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extern void spurious_interrupt(void);
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/*
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* Before R2 the timer and performance counter interrupts were both fixed to
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* IE7. Since R2 their number has to be read from the c0_intctl register.
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*/
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#define CP0_LEGACY_COMPARE_IRQ 7
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#define CP0_LEGACY_PERFCNT_IRQ 7
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extern int cp0_compare_irq;
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extern int cp0_compare_irq_shift;
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extern int cp0_perfcount_irq;
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extern int cp0_fdc_irq;
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extern int get_c0_fdc_int(void);
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void arch_trigger_cpumask_backtrace(const struct cpumask *mask,
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int exclude_cpu);
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#define arch_trigger_cpumask_backtrace arch_trigger_cpumask_backtrace
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#endif /* _ASM_IRQ_H */
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