979c2c049f
The indentation for ice_set_ctx and ice_write_rxq_ctx breaks the function name after the return type. This style of breaking is used a lot throughout the ice driver, even in cases where its not actually helpful for readability. We no longer prefer this style of line splitting in the driver, and new code is avoiding it. Normally, I would leave this alone unless the actual function contents or description needed updating. However, a future change is going to add inverse functions for converting packed context to unpacked context structures. To keep this code uniform with the existing set functions, fix up the style to the modern format of keeping the type on the same line. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
280 lines
10 KiB
C
280 lines
10 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2018, Intel Corporation. */
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#ifndef _ICE_COMMON_H_
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#define _ICE_COMMON_H_
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#include <linux/bitfield.h>
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#include "ice.h"
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#include "ice_type.h"
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#include "ice_nvm.h"
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#include "ice_flex_pipe.h"
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#include <linux/avf/virtchnl.h>
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#include "ice_switch.h"
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#include "ice_fdir.h"
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#define ICE_SQ_SEND_DELAY_TIME_MS 10
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#define ICE_SQ_SEND_MAX_EXECUTE 3
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int ice_init_hw(struct ice_hw *hw);
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void ice_deinit_hw(struct ice_hw *hw);
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int ice_check_reset(struct ice_hw *hw);
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int ice_reset(struct ice_hw *hw, enum ice_reset_req req);
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int ice_create_all_ctrlq(struct ice_hw *hw);
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int ice_init_all_ctrlq(struct ice_hw *hw);
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void ice_shutdown_all_ctrlq(struct ice_hw *hw);
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void ice_destroy_all_ctrlq(struct ice_hw *hw);
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int
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ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,
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struct ice_rq_event_info *e, u16 *pending);
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int
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ice_get_link_status(struct ice_port_info *pi, bool *link_up);
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int ice_update_link_info(struct ice_port_info *pi);
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int
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ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
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enum ice_aq_res_access_type access, u32 timeout);
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void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res);
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int
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ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res);
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int
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ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res);
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int ice_aq_alloc_free_res(struct ice_hw *hw,
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struct ice_aqc_alloc_free_res_elem *buf, u16 buf_size,
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enum ice_adminq_opc opc);
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bool ice_is_sbq_supported(struct ice_hw *hw);
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struct ice_ctl_q_info *ice_get_sbq(struct ice_hw *hw);
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int
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ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,
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struct ice_aq_desc *desc, void *buf, u16 buf_size,
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struct ice_sq_cd *cd);
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void ice_clear_pxe_mode(struct ice_hw *hw);
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int ice_get_caps(struct ice_hw *hw);
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void ice_set_safe_mode_caps(struct ice_hw *hw);
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int ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
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u32 rxq_index);
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int
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ice_aq_get_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *get_params);
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int
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ice_aq_set_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *set_params);
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int
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ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle,
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struct ice_aqc_get_set_rss_keys *keys);
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int
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ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,
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struct ice_aqc_get_set_rss_keys *keys);
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bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq);
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int ice_aq_q_shutdown(struct ice_hw *hw, bool unloading);
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void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode);
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extern const struct ice_ctx_ele ice_tlan_ctx_info[];
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int ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx,
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const struct ice_ctx_ele *ce_info);
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extern struct mutex ice_global_cfg_lock_sw;
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int
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ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc,
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void *buf, u16 buf_size, struct ice_sq_cd *cd);
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int ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd);
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int
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ice_aq_send_driver_ver(struct ice_hw *hw, struct ice_driver_ver *dv,
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struct ice_sq_cd *cd);
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int
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ice_aq_set_port_params(struct ice_port_info *pi, bool double_vlan,
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struct ice_sq_cd *cd);
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int
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ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,
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struct ice_aqc_get_phy_caps_data *caps,
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struct ice_sq_cd *cd);
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bool ice_is_pf_c827(struct ice_hw *hw);
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bool ice_is_phy_rclk_in_netlist(struct ice_hw *hw);
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bool ice_is_clock_mux_in_netlist(struct ice_hw *hw);
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bool ice_is_cgu_in_netlist(struct ice_hw *hw);
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bool ice_is_gps_in_netlist(struct ice_hw *hw);
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int
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ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd,
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u8 *node_part_number, u16 *node_handle);
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int
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ice_aq_list_caps(struct ice_hw *hw, void *buf, u16 buf_size, u32 *cap_count,
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enum ice_adminq_opc opc, struct ice_sq_cd *cd);
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int
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ice_discover_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_caps);
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void
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ice_update_phy_type(u64 *phy_type_low, u64 *phy_type_high,
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u16 link_speeds_bitmap);
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int
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ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags,
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struct ice_sq_cd *cd);
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bool ice_is_generic_mac(struct ice_hw *hw);
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bool ice_is_e810(struct ice_hw *hw);
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int ice_clear_pf_cfg(struct ice_hw *hw);
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int
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ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi,
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struct ice_aqc_set_phy_cfg_data *cfg, struct ice_sq_cd *cd);
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bool ice_fw_supports_link_override(struct ice_hw *hw);
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int
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ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,
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struct ice_port_info *pi);
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bool ice_is_phy_caps_an_enabled(struct ice_aqc_get_phy_caps_data *caps);
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enum ice_fc_mode ice_caps_to_fc_mode(u8 caps);
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enum ice_fec_mode ice_caps_to_fec_mode(u8 caps, u8 fec_options);
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int
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ice_set_fc(struct ice_port_info *pi, u8 *aq_failures,
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bool ena_auto_link_update);
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int
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ice_cfg_phy_fc(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
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enum ice_fc_mode req_mode);
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bool
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ice_phy_caps_equals_cfg(struct ice_aqc_get_phy_caps_data *caps,
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struct ice_aqc_set_phy_cfg_data *cfg);
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void
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ice_copy_phy_caps_to_cfg(struct ice_port_info *pi,
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struct ice_aqc_get_phy_caps_data *caps,
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struct ice_aqc_set_phy_cfg_data *cfg);
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int
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ice_cfg_phy_fec(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
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enum ice_fec_mode fec);
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int
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ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,
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struct ice_sq_cd *cd);
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int
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ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd);
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int
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ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
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struct ice_link_status *link, struct ice_sq_cd *cd);
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int
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ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask,
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struct ice_sq_cd *cd);
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int
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ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd);
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int
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ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
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struct ice_sq_cd *cd);
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int
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ice_aq_get_port_options(struct ice_hw *hw,
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struct ice_aqc_get_port_options_elem *options,
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u8 *option_count, u8 lport, bool lport_valid,
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u8 *active_option_idx, bool *active_option_valid,
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u8 *pending_option_idx, bool *pending_option_valid);
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int
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ice_aq_set_port_option(struct ice_hw *hw, u8 lport, u8 lport_valid,
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u8 new_option);
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int
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ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr,
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u16 mem_addr, u8 page, u8 set_page, u8 *data, u8 length,
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bool write, struct ice_sq_cd *cd);
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u32 ice_get_link_speed(u16 index);
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int
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ice_cfg_vsi_rdma(struct ice_port_info *pi, u16 vsi_handle, u16 tc_bitmap,
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u16 *max_rdmaqs);
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int
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ice_ena_vsi_rdma_qset(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
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u16 *rdma_qset, u16 num_qsets, u32 *qset_teid);
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int
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ice_dis_vsi_rdma_qset(struct ice_port_info *pi, u16 count, u32 *qset_teid,
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u16 *q_id);
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int
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ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
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u16 *q_handle, u16 *q_ids, u32 *q_teids,
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enum ice_disq_rst_src rst_src, u16 vmvf_num,
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struct ice_sq_cd *cd);
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int
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ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
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u16 *max_lanqs);
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int
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ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
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u8 num_qgrps, struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
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struct ice_sq_cd *cd);
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int
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ice_aq_cfg_lan_txq(struct ice_hw *hw, struct ice_aqc_cfg_txqs_buf *buf,
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u16 buf_size, u16 num_qs, u8 oldport, u8 newport,
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struct ice_sq_cd *cd);
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int ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle);
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void ice_replay_post(struct ice_hw *hw);
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struct ice_q_ctx *
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ice_get_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 q_handle);
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int ice_sbq_rw_reg(struct ice_hw *hw, struct ice_sbq_msg_input *in);
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int
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ice_aq_get_cgu_abilities(struct ice_hw *hw,
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struct ice_aqc_get_cgu_abilities *abilities);
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int
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ice_aq_set_input_pin_cfg(struct ice_hw *hw, u8 input_idx, u8 flags1, u8 flags2,
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u32 freq, s32 phase_delay);
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int
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ice_aq_get_input_pin_cfg(struct ice_hw *hw, u8 input_idx, u8 *status, u8 *type,
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u8 *flags1, u8 *flags2, u32 *freq, s32 *phase_delay);
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int
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ice_aq_set_output_pin_cfg(struct ice_hw *hw, u8 output_idx, u8 flags,
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u8 src_sel, u32 freq, s32 phase_delay);
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int
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ice_aq_get_output_pin_cfg(struct ice_hw *hw, u8 output_idx, u8 *flags,
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u8 *src_sel, u32 *freq, u32 *src_freq);
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int
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ice_aq_get_cgu_dpll_status(struct ice_hw *hw, u8 dpll_num, u8 *ref_state,
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u8 *dpll_state, u8 *config, s64 *phase_offset,
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u8 *eec_mode);
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int
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ice_aq_set_cgu_dpll_config(struct ice_hw *hw, u8 dpll_num, u8 ref_state,
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u8 config, u8 eec_mode);
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int
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ice_aq_set_cgu_ref_prio(struct ice_hw *hw, u8 dpll_num, u8 ref_idx,
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u8 ref_priority);
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int
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ice_aq_get_cgu_ref_prio(struct ice_hw *hw, u8 dpll_num, u8 ref_idx,
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u8 *ref_prio);
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int
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ice_aq_get_cgu_info(struct ice_hw *hw, u32 *cgu_id, u32 *cgu_cfg_ver,
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u32 *cgu_fw_ver);
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int
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ice_aq_set_phy_rec_clk_out(struct ice_hw *hw, u8 phy_output, bool enable,
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u32 *freq);
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int
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ice_aq_get_phy_rec_clk_out(struct ice_hw *hw, u8 *phy_output, u8 *port_num,
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u8 *flags, u16 *node_handle);
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int ice_aq_get_sensor_reading(struct ice_hw *hw,
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struct ice_aqc_get_sensor_reading_resp *data);
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void
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ice_stat_update40(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
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u64 *prev_stat, u64 *cur_stat);
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void
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ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
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u64 *prev_stat, u64 *cur_stat);
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bool ice_is_e810t(struct ice_hw *hw);
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bool ice_is_e823(struct ice_hw *hw);
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bool ice_is_e825c(struct ice_hw *hw);
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int
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ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
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struct ice_aqc_txsched_elem_data *buf);
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int
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ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value,
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struct ice_sq_cd *cd);
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int
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ice_aq_get_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,
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bool *value, struct ice_sq_cd *cd);
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bool ice_is_100m_speed_supported(struct ice_hw *hw);
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int
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ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
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struct ice_sq_cd *cd);
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bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw);
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int
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ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add);
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int ice_lldp_execute_pending_mib(struct ice_hw *hw);
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int
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ice_aq_read_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,
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u16 bus_addr, __le16 addr, u8 params, u8 *data,
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struct ice_sq_cd *cd);
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int
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ice_aq_write_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,
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u16 bus_addr, __le16 addr, u8 params, const u8 *data,
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struct ice_sq_cd *cd);
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bool ice_fw_supports_report_dflt_cfg(struct ice_hw *hw);
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#endif /* _ICE_COMMON_H_ */
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