Inochi Amaoto 1eba0b61be riscv: dts: sophgo: add reserved memory node for CV1800B ... The original dts of CV1800B has a weird memory length as it contains reserved memory for coprocessor. Make this area a separate node so it can get the real memory length. Link: https://lore.kernel.org/r/IA1PR20MB49531F274753B04A5547DB59BB052@IA1PR20MB4953.namprd20.prod.outlook.com Signed-off-by: Inochi Amaoto <inochiama@outlook.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com>		2024-04-23 16:38:09 +08:00
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cv18xx.dtsi	riscv: dts: sophgo: use real clock for sdhci	2024-04-22 08:31:05 +08:00
cv1800b-milkv-duo.dts	riscv: dts: sophgo: add reserved memory node for CV1800B	2024-04-23 16:38:09 +08:00
cv1800b.dtsi	riscv: dts: sophgo: add reserved memory node for CV1800B	2024-04-23 16:38:09 +08:00
cv1812h-huashan-pi.dts	riscv: dts: sophgo: add Huashan Pi board device tree	2023-11-30 12:40:36 +00:00
cv1812h.dtsi	riscv: dts: sophgo: add clock generator for Sophgo CV1800 series SoC	2024-04-11 15:28:56 +08:00
Makefile	riscv: dts: sophgo: add Huashan Pi board device tree	2023-11-30 12:40:36 +00:00
sg2042-cpus.dtsi	riscv: dts: add initial Sophgo SG2042 SoC device tree	2023-10-07 11:16:51 +01:00
sg2042-milkv-pioneer.dts	riscv: dts: sophgo: add Milk-V Pioneer board device tree	2023-10-07 11:17:01 +01:00
sg2042.dtsi	riscv: dts: add resets property for uart node	2024-02-23 12:38:03 +08:00