bb5aa08572
The VCLK and VCLK_DIV clocks have supplementary bits. The VCLK gate has a "SOFT RESET" bit to toggle after the whole VCLK sub-tree rate has been set, this is implemented in the gate enable callback. The VCLK_DIV clocks as enable and reset bits used to disable and reset the divider, associated with CLK_SET_RATE_GATE it ensures the rate is set while the divider is disabled and in reset mode. The VCLK_DIV enable bit isn't implemented as a gate since it's part of the divider logic and vendor does this exact sequence to ensure the divider is correctly set. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20240403-amlogic-v6-4-upstream-dsi-ccf-vim3-v12-2-99ecdfdc87fc@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
27 lines
1.2 KiB
Makefile
27 lines
1.2 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0-only
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# Amlogic clock drivers
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obj-$(CONFIG_COMMON_CLK_MESON_CLKC_UTILS) += meson-clkc-utils.o
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obj-$(CONFIG_COMMON_CLK_MESON_AO_CLKC) += meson-aoclk.o
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obj-$(CONFIG_COMMON_CLK_MESON_CPU_DYNDIV) += clk-cpu-dyndiv.o
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obj-$(CONFIG_COMMON_CLK_MESON_DUALDIV) += clk-dualdiv.o
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obj-$(CONFIG_COMMON_CLK_MESON_EE_CLKC) += meson-eeclk.o
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obj-$(CONFIG_COMMON_CLK_MESON_MPLL) += clk-mpll.o
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obj-$(CONFIG_COMMON_CLK_MESON_PHASE) += clk-phase.o
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obj-$(CONFIG_COMMON_CLK_MESON_PLL) += clk-pll.o
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obj-$(CONFIG_COMMON_CLK_MESON_REGMAP) += clk-regmap.o
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obj-$(CONFIG_COMMON_CLK_MESON_SCLK_DIV) += sclk-div.o
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obj-$(CONFIG_COMMON_CLK_MESON_VID_PLL_DIV) += vid-pll-div.o
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obj-$(CONFIG_COMMON_CLK_MESON_VCLK) += vclk.o
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# Amlogic Clock controllers
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obj-$(CONFIG_COMMON_CLK_AXG) += axg.o axg-aoclk.o
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obj-$(CONFIG_COMMON_CLK_AXG_AUDIO) += axg-audio.o
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obj-$(CONFIG_COMMON_CLK_A1_PLL) += a1-pll.o
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obj-$(CONFIG_COMMON_CLK_A1_PERIPHERALS) += a1-peripherals.o
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obj-$(CONFIG_COMMON_CLK_GXBB) += gxbb.o gxbb-aoclk.o
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obj-$(CONFIG_COMMON_CLK_G12A) += g12a.o g12a-aoclk.o
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obj-$(CONFIG_COMMON_CLK_MESON8B) += meson8b.o meson8-ddr.o
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obj-$(CONFIG_COMMON_CLK_S4_PLL) += s4-pll.o
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obj-$(CONFIG_COMMON_CLK_S4_PERIPHERALS) += s4-peripherals.o
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