The Allwinner SoC's typically have an upper and lower limit for their clocks' rates. Up until now, support for that has been implemented separately for each clock type. Implement that functionality in the sunxi-ng's common part making use of the CCF rate liming capabilities, so that it is available for all clock types. Suggested-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Frank Oltmanns <frank@oltmanns.dev> Cc: stable@vger.kernel.org Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Acked-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20240310-pinephone-pll-fixes-v4-1-46fc80c83637@oltmanns.dev Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
250 lines
5.8 KiB
C
250 lines
5.8 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright 2016 Maxime Ripard
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*
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*/
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/device.h>
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#include <linux/iopoll.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include "ccu_common.h"
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#include "ccu_gate.h"
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#include "ccu_reset.h"
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struct sunxi_ccu {
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const struct sunxi_ccu_desc *desc;
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spinlock_t lock;
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struct ccu_reset reset;
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};
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void ccu_helper_wait_for_lock(struct ccu_common *common, u32 lock)
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{
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void __iomem *addr;
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u32 reg;
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if (!lock)
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return;
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if (common->features & CCU_FEATURE_LOCK_REG)
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addr = common->base + common->lock_reg;
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else
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addr = common->base + common->reg;
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WARN_ON(readl_relaxed_poll_timeout(addr, reg, reg & lock, 100, 70000));
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}
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EXPORT_SYMBOL_NS_GPL(ccu_helper_wait_for_lock, SUNXI_CCU);
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bool ccu_is_better_rate(struct ccu_common *common,
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unsigned long target_rate,
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unsigned long current_rate,
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unsigned long best_rate)
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{
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unsigned long min_rate, max_rate;
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clk_hw_get_rate_range(&common->hw, &min_rate, &max_rate);
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if (current_rate > max_rate)
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return false;
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if (current_rate < min_rate)
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return false;
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if (common->features & CCU_FEATURE_CLOSEST_RATE)
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return abs(current_rate - target_rate) < abs(best_rate - target_rate);
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return current_rate <= target_rate && current_rate > best_rate;
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}
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EXPORT_SYMBOL_NS_GPL(ccu_is_better_rate, SUNXI_CCU);
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/*
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* This clock notifier is called when the frequency of a PLL clock is
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* changed. In common PLL designs, changes to the dividers take effect
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* almost immediately, while changes to the multipliers (implemented
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* as dividers in the feedback loop) take a few cycles to work into
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* the feedback loop for the PLL to stablize.
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*
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* Sometimes when the PLL clock rate is changed, the decrease in the
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* divider is too much for the decrease in the multiplier to catch up.
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* The PLL clock rate will spike, and in some cases, might lock up
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* completely.
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*
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* This notifier callback will gate and then ungate the clock,
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* effectively resetting it, so it proceeds to work. Care must be
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* taken to reparent consumers to other temporary clocks during the
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* rate change, and that this notifier callback must be the first
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* to be registered.
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*/
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static int ccu_pll_notifier_cb(struct notifier_block *nb,
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unsigned long event, void *data)
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{
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struct ccu_pll_nb *pll = to_ccu_pll_nb(nb);
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int ret = 0;
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if (event != POST_RATE_CHANGE)
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goto out;
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ccu_gate_helper_disable(pll->common, pll->enable);
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ret = ccu_gate_helper_enable(pll->common, pll->enable);
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if (ret)
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goto out;
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ccu_helper_wait_for_lock(pll->common, pll->lock);
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out:
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return notifier_from_errno(ret);
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}
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int ccu_pll_notifier_register(struct ccu_pll_nb *pll_nb)
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{
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pll_nb->clk_nb.notifier_call = ccu_pll_notifier_cb;
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return clk_notifier_register(pll_nb->common->hw.clk,
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&pll_nb->clk_nb);
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}
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EXPORT_SYMBOL_NS_GPL(ccu_pll_notifier_register, SUNXI_CCU);
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static int sunxi_ccu_probe(struct sunxi_ccu *ccu, struct device *dev,
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struct device_node *node, void __iomem *reg,
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const struct sunxi_ccu_desc *desc)
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{
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struct ccu_reset *reset;
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int i, ret;
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ccu->desc = desc;
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spin_lock_init(&ccu->lock);
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for (i = 0; i < desc->num_ccu_clks; i++) {
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struct ccu_common *cclk = desc->ccu_clks[i];
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if (!cclk)
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continue;
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cclk->base = reg;
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cclk->lock = &ccu->lock;
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}
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for (i = 0; i < desc->hw_clks->num ; i++) {
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struct clk_hw *hw = desc->hw_clks->hws[i];
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struct ccu_common *common = hw_to_ccu_common(hw);
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const char *name;
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if (!hw)
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continue;
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name = hw->init->name;
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if (dev)
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ret = clk_hw_register(dev, hw);
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else
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ret = of_clk_hw_register(node, hw);
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if (ret) {
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pr_err("Couldn't register clock %d - %s\n", i, name);
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goto err_clk_unreg;
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}
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if (common->max_rate)
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clk_hw_set_rate_range(hw, common->min_rate,
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common->max_rate);
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else
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WARN(common->min_rate,
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"No max_rate, ignoring min_rate of clock %d - %s\n",
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i, name);
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}
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ret = of_clk_add_hw_provider(node, of_clk_hw_onecell_get,
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desc->hw_clks);
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if (ret)
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goto err_clk_unreg;
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reset = &ccu->reset;
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reset->rcdev.of_node = node;
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reset->rcdev.ops = &ccu_reset_ops;
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reset->rcdev.owner = dev ? dev->driver->owner : THIS_MODULE;
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reset->rcdev.nr_resets = desc->num_resets;
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reset->base = reg;
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reset->lock = &ccu->lock;
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reset->reset_map = desc->resets;
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ret = reset_controller_register(&reset->rcdev);
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if (ret)
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goto err_del_provider;
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return 0;
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err_del_provider:
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of_clk_del_provider(node);
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err_clk_unreg:
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while (--i >= 0) {
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struct clk_hw *hw = desc->hw_clks->hws[i];
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if (!hw)
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continue;
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clk_hw_unregister(hw);
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}
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return ret;
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}
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static void devm_sunxi_ccu_release(struct device *dev, void *res)
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{
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struct sunxi_ccu *ccu = res;
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const struct sunxi_ccu_desc *desc = ccu->desc;
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int i;
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reset_controller_unregister(&ccu->reset.rcdev);
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of_clk_del_provider(dev->of_node);
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for (i = 0; i < desc->hw_clks->num; i++) {
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struct clk_hw *hw = desc->hw_clks->hws[i];
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if (!hw)
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continue;
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clk_hw_unregister(hw);
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}
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}
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int devm_sunxi_ccu_probe(struct device *dev, void __iomem *reg,
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const struct sunxi_ccu_desc *desc)
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{
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struct sunxi_ccu *ccu;
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int ret;
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ccu = devres_alloc(devm_sunxi_ccu_release, sizeof(*ccu), GFP_KERNEL);
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if (!ccu)
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return -ENOMEM;
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ret = sunxi_ccu_probe(ccu, dev, dev->of_node, reg, desc);
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if (ret) {
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devres_free(ccu);
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return ret;
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}
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devres_add(dev, ccu);
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return 0;
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}
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EXPORT_SYMBOL_NS_GPL(devm_sunxi_ccu_probe, SUNXI_CCU);
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void of_sunxi_ccu_probe(struct device_node *node, void __iomem *reg,
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const struct sunxi_ccu_desc *desc)
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{
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struct sunxi_ccu *ccu;
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int ret;
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ccu = kzalloc(sizeof(*ccu), GFP_KERNEL);
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if (!ccu)
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return;
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ret = sunxi_ccu_probe(ccu, NULL, node, reg, desc);
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if (ret) {
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pr_err("%pOF: probing clocks failed: %d\n", node, ret);
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kfree(ccu);
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}
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}
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MODULE_LICENSE("GPL");
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