cec82816d0
Allow user to provide a low latency context hint. When set, KMD sends a hint to GuC which results in special handling for this context. SLPC will ramp the GT frequency aggressively every time it switches to this context. The down freq threshold will also be lower so GuC will ramp down the GT freq for this context more slowly. We also disable waitboost for this context as that will interfere with the strategy. We need to enable the use of SLPC Compute strategy during init, but it will apply only to contexts that set this bit during context creation. Userland can check whether this feature is supported using a new param- I915_PARAM_HAS_CONTEXT_FREQ_HINT. This flag is true for all guc submission enabled platforms as they use SLPC for frequency management. The Mesa usage model for this flag is here - https://gitlab.freedesktop.org/sushmave/mesa/-/commits/compute_hint v2: Rename flags as per review suggestions (Rodrigo, Tvrtko). Also, use flag bits in intel_context as it allows finer control for toggling per engine if needed (Tvrtko). v3: Minor review comments (Tvrtko) v4: Update comment (Sushma) Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Cc: Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Acked-by: Ivan Briano <ivan.briano@intel.com> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240306012759.204938-1-vinay.belgaumkar@intel.com
50 lines
1.7 KiB
C
50 lines
1.7 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2021 Intel Corporation
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*/
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#ifndef _INTEL_GUC_SLPC_H_
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#define _INTEL_GUC_SLPC_H_
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#include "intel_guc_submission.h"
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#include "intel_guc_slpc_types.h"
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#define SLPC_MAX_FREQ_MHZ 4250
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struct intel_gt;
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struct drm_printer;
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static inline bool intel_guc_slpc_is_supported(struct intel_guc *guc)
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{
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return guc->slpc.supported;
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}
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static inline bool intel_guc_slpc_is_wanted(struct intel_guc *guc)
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{
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return guc->slpc.selected;
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}
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static inline bool intel_guc_slpc_is_used(struct intel_guc *guc)
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{
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return intel_guc_submission_is_used(guc) && intel_guc_slpc_is_wanted(guc);
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}
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void intel_guc_slpc_init_early(struct intel_guc_slpc *slpc);
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int intel_guc_slpc_init(struct intel_guc_slpc *slpc);
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int intel_guc_slpc_enable(struct intel_guc_slpc *slpc);
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void intel_guc_slpc_fini(struct intel_guc_slpc *slpc);
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int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val);
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int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val);
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int intel_guc_slpc_set_boost_freq(struct intel_guc_slpc *slpc, u32 val);
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int intel_guc_slpc_get_max_freq(struct intel_guc_slpc *slpc, u32 *val);
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int intel_guc_slpc_get_min_freq(struct intel_guc_slpc *slpc, u32 *val);
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int intel_guc_slpc_print_info(struct intel_guc_slpc *slpc, struct drm_printer *p);
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int intel_guc_slpc_set_media_ratio_mode(struct intel_guc_slpc *slpc, u32 val);
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void intel_guc_pm_intrmsk_enable(struct intel_gt *gt);
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void intel_guc_slpc_boost(struct intel_guc_slpc *slpc);
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void intel_guc_slpc_dec_waiters(struct intel_guc_slpc *slpc);
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int intel_guc_slpc_set_ignore_eff_freq(struct intel_guc_slpc *slpc, bool val);
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int intel_guc_slpc_set_strategy(struct intel_guc_slpc *slpc, u32 val);
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#endif
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