b9b7db4908
The LRCs on some of our newer platforms appear to contain a few GPU instructions that weren't handled in our LRC parser. Add the relevant instruction names and opcodes so that our debugfs LRC dumps will properly indicate what these are. Bspec: 55866, 64848, 46931 Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Ravi Kumar Vodapalli <ravi.kumar.vodapalli@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240222184009.6857-2-matthew.d.roper@intel.com
18 lines
394 B
C
18 lines
394 B
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2024 Intel Corporation
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*/
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#ifndef _XE_GFX_STATE_COMMANDS_H_
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#define _XE_GFX_STATE_COMMANDS_H_
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#include "instructions/xe_instr_defs.h"
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#define GFX_STATE_OPCODE REG_GENMASK(28, 26)
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#define GFX_STATE_CMD(opcode) \
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(XE_INSTR_GFX_STATE | REG_FIELD_PREP(GFX_STATE_OPCODE, opcode))
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#define STATE_WRITE_INLINE GFX_STATE_CMD(0x0)
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#endif
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