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linux/drivers/gpu/drm/xe/regs
Michal Wajdeczko 9e56d026c6 drm/xe: Allow to assign GGTT region to the VF
VF's drivers can't modify GGTT PTEs except the range explicitly
assigned by the PF driver. To allow hardware enforcement of this
requirement, each GGTT PTE has a field with the VF number that
identifies which VF can modify that particular GGTT PTE entry.

Only PF driver can modify this field and PF driver shall do that
before VF drivers will be loaded. Add function to prepare PTEs.
Since it will be used only by the PF driver, make it available
only for CONFIG_PCI_IOV=y.

Bspec: 45015, 52395
Reviewed-by: Piotr Piórkowski <piotr.piorkowski@intel.com>
Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240415173937.1287-3-michal.wajdeczko@intel.com
2024-04-16 12:37:29 +02:00
..
xe_engine_regs.h drm/xe: Label RING_CONTEXT_CONTROL as masked 2024-04-08 08:01:00 -07:00
xe_gpu_commands.h drm/xe/xe2: Updates on XY_CTRL_SURF_COPY_BLT 2023-12-21 11:46:15 -05:00
xe_gsc_regs.h drm/xe/gsc: Handle GSCCS ER interrupt 2024-03-14 14:47:13 -07:00
xe_gt_regs.h drm/xe/gt: Add L3 bank mask to GT topology 2024-04-15 13:45:05 -07:00
xe_gtt_defs.h drm/xe: Allow to assign GGTT region to the VF 2024-04-16 12:37:29 +02:00
xe_guc_regs.h drm/xe: Mark VF accessible GuC registers 2024-03-15 22:20:14 +01:00
xe_lrc_layout.h drm/xe: Update LRC context layout definitions 2023-12-21 16:31:29 -05:00
xe_mchbar_regs.h drm/xe/hwmon: Expose power1_max_interval 2023-12-21 11:43:32 -05:00
xe_pcode_regs.h drm/xe/hwmon: Refactor xe hwmon 2024-02-06 08:42:03 -05:00
xe_reg_defs.h drm/xe: Define xe_reg_is_valid 2024-04-09 09:57:31 -07:00
xe_regs.h drm/xe: Mark VF accessible global registers 2024-03-15 22:20:14 +01:00
xe_sriov_regs.h drm/xe/vf: Add proper detection of the SR-IOV VF mode 2024-03-28 13:45:37 +01:00