dd08ebf6c3
Xe, is a new driver for Intel GPUs that supports both integrated and discrete platforms starting with Tiger Lake (first Intel Xe Architecture). The code is at a stage where it is already functional and has experimental support for multiple platforms starting from Tiger Lake, with initial support implemented in Mesa (for Iris and Anv, our OpenGL and Vulkan drivers), as well as in NEO (for OpenCL and Level0). The new Xe driver leverages a lot from i915. As for display, the intent is to share the display code with the i915 driver so that there is maximum reuse there. But it is not added in this patch. This initial work is a collaboration of many people and unfortunately the big squashed patch won't fully honor the proper credits. But let's get some git quick stats so we can at least try to preserve some of the credits: Co-developed-by: Matthew Brost <matthew.brost@intel.com> Co-developed-by: Matthew Auld <matthew.auld@intel.com> Co-developed-by: Matt Roper <matthew.d.roper@intel.com> Co-developed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Co-developed-by: Francois Dugast <francois.dugast@intel.com> Co-developed-by: Lucas De Marchi <lucas.demarchi@intel.com> Co-developed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Co-developed-by: Philippe Lecluse <philippe.lecluse@intel.com> Co-developed-by: Nirmoy Das <nirmoy.das@intel.com> Co-developed-by: Jani Nikula <jani.nikula@intel.com> Co-developed-by: José Roberto de Souza <jose.souza@intel.com> Co-developed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Co-developed-by: Dave Airlie <airlied@redhat.com> Co-developed-by: Faith Ekstrand <faith.ekstrand@collabora.com> Co-developed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Co-developed-by: Mauro Carvalho Chehab <mchehab@kernel.org> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
73 lines
1.9 KiB
C
73 lines
1.9 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2023 Intel Corporation
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*/
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#ifndef _XE_GPU_SCHEDULER_H_
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#define _XE_GPU_SCHEDULER_H_
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#include "xe_gpu_scheduler_types.h"
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#include "xe_sched_job_types.h"
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int xe_sched_init(struct xe_gpu_scheduler *sched,
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const struct drm_sched_backend_ops *ops,
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const struct xe_sched_backend_ops *xe_ops,
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struct workqueue_struct *submit_wq,
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uint32_t hw_submission, unsigned hang_limit,
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long timeout, struct workqueue_struct *timeout_wq,
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atomic_t *score, const char *name,
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struct device *dev);
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void xe_sched_fini(struct xe_gpu_scheduler *sched);
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void xe_sched_submission_start(struct xe_gpu_scheduler *sched);
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void xe_sched_submission_stop(struct xe_gpu_scheduler *sched);
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void xe_sched_add_msg(struct xe_gpu_scheduler *sched,
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struct xe_sched_msg *msg);
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static inline void xe_sched_stop(struct xe_gpu_scheduler *sched)
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{
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drm_sched_stop(&sched->base, NULL);
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}
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static inline void xe_sched_tdr_queue_imm(struct xe_gpu_scheduler *sched)
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{
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drm_sched_tdr_queue_imm(&sched->base);
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}
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static inline void xe_sched_resubmit_jobs(struct xe_gpu_scheduler *sched)
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{
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drm_sched_resubmit_jobs(&sched->base);
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}
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static inline bool
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xe_sched_invalidate_job(struct xe_sched_job *job, int threshold)
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{
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return drm_sched_invalidate_job(&job->drm, threshold);
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}
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static inline void xe_sched_add_pending_job(struct xe_gpu_scheduler *sched,
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struct xe_sched_job *job)
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{
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list_add(&job->drm.list, &sched->base.pending_list);
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}
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static inline
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struct xe_sched_job *xe_sched_first_pending_job(struct xe_gpu_scheduler *sched)
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{
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return list_first_entry_or_null(&sched->base.pending_list,
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struct xe_sched_job, drm.list);
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}
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static inline int
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xe_sched_entity_init(struct xe_sched_entity *entity,
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struct xe_gpu_scheduler *sched)
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{
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return drm_sched_entity_init(entity, 0,
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(struct drm_gpu_scheduler **)&sched,
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1, NULL);
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}
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#define xe_sched_entity_fini drm_sched_entity_fini
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#endif
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