62742d1266
The flags stored in the BO grew over time without following much a naming pattern. First of all, get rid of the _BIT suffix that was banned from everywhere else due to the guideline in drivers/gpu/drm/i915/i915_reg.h that xe kind of follows: Define bits using ``REG_BIT(N)``. Do **not** add ``_BIT`` suffix to the name. Here the flags aren't for a register, but it's good practice to keep it consistent. Second divergence on names is the use or not of "CREATE". This is because most of the flags are passed to xe_bo_create*() family of functions, changing its behavior. However, since the flags are also stored in the bo itself and checked elsewhere in the code, it seems better to just omit the CREATE part. With those 2 guidelines, all the flags are given the form XE_BO_FLAG_<FLAG_NAME> with the following commands: git grep -le "XE_BO_" -- drivers/gpu/drm/xe | xargs sed -i \ -e "s/XE_BO_\([_A-Z0-9]*\)_BIT/XE_BO_\1/g" \ -e 's/XE_BO_CREATE_/XE_BO_FLAG_/g' git grep -le "XE_BO_" -- drivers/gpu/drm/xe | xargs sed -i -r \ -e 's/XE_BO_(DEFER_BACKING|SCANOUT|FIXED_PLACEMENT|PAGETABLE|NEEDS_CPU_ACCESS|NEEDS_UC|INTERNAL_TEST|INTERNAL_64K|GGTT_INVALIDATE)/XE_BO_FLAG_\1/g' And then the defines in drivers/gpu/drm/xe/xe_bo.h are adjusted to follow the coding style. Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240322142702.186529-3-lucas.demarchi@intel.com Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
107 lines
2.5 KiB
C
107 lines
2.5 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2022 Intel Corporation
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*/
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#include "xe_sa.h"
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#include <linux/kernel.h>
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#include <drm/drm_managed.h>
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#include "xe_bo.h"
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#include "xe_device.h"
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#include "xe_map.h"
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static void xe_sa_bo_manager_fini(struct drm_device *drm, void *arg)
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{
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struct xe_sa_manager *sa_manager = arg;
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struct xe_bo *bo = sa_manager->bo;
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if (!bo) {
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drm_err(drm, "no bo for sa manager\n");
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return;
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}
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drm_suballoc_manager_fini(&sa_manager->base);
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if (bo->vmap.is_iomem)
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kvfree(sa_manager->cpu_ptr);
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xe_bo_unpin_map_no_vm(bo);
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sa_manager->bo = NULL;
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}
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struct xe_sa_manager *xe_sa_bo_manager_init(struct xe_tile *tile, u32 size, u32 align)
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{
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struct xe_device *xe = tile_to_xe(tile);
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u32 managed_size = size - SZ_4K;
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struct xe_bo *bo;
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int ret;
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struct xe_sa_manager *sa_manager = drmm_kzalloc(&tile_to_xe(tile)->drm,
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sizeof(*sa_manager),
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GFP_KERNEL);
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if (!sa_manager)
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return ERR_PTR(-ENOMEM);
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sa_manager->bo = NULL;
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bo = xe_bo_create_pin_map(xe, tile, NULL, size, ttm_bo_type_kernel,
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XE_BO_FLAG_VRAM_IF_DGFX(tile) |
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XE_BO_FLAG_GGTT |
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XE_BO_FLAG_GGTT_INVALIDATE);
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if (IS_ERR(bo)) {
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drm_err(&xe->drm, "failed to allocate bo for sa manager: %ld\n",
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PTR_ERR(bo));
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return (struct xe_sa_manager *)bo;
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}
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sa_manager->bo = bo;
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drm_suballoc_manager_init(&sa_manager->base, managed_size, align);
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sa_manager->gpu_addr = xe_bo_ggtt_addr(bo);
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if (bo->vmap.is_iomem) {
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sa_manager->cpu_ptr = kvzalloc(managed_size, GFP_KERNEL);
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if (!sa_manager->cpu_ptr) {
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xe_bo_unpin_map_no_vm(sa_manager->bo);
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sa_manager->bo = NULL;
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return ERR_PTR(-ENOMEM);
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}
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} else {
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sa_manager->cpu_ptr = bo->vmap.vaddr;
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memset(sa_manager->cpu_ptr, 0, bo->ttm.base.size);
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}
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ret = drmm_add_action_or_reset(&xe->drm, xe_sa_bo_manager_fini,
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sa_manager);
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if (ret)
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return ERR_PTR(ret);
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return sa_manager;
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}
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struct drm_suballoc *xe_sa_bo_new(struct xe_sa_manager *sa_manager,
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unsigned int size)
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{
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return drm_suballoc_new(&sa_manager->base, size, GFP_KERNEL, true, 0);
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}
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void xe_sa_bo_flush_write(struct drm_suballoc *sa_bo)
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{
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struct xe_sa_manager *sa_manager = to_xe_sa_manager(sa_bo->manager);
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struct xe_device *xe = tile_to_xe(sa_manager->bo->tile);
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if (!sa_manager->bo->vmap.is_iomem)
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return;
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xe_map_memcpy_to(xe, &sa_manager->bo->vmap, drm_suballoc_soffset(sa_bo),
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xe_sa_bo_cpu_addr(sa_bo),
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drm_suballoc_size(sa_bo));
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}
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void xe_sa_bo_free(struct drm_suballoc *sa_bo,
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struct dma_fence *fence)
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{
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drm_suballoc_free(sa_bo, fence);
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}
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