d29a8134c7
The PTP hardware semaphore (PFTSYN_SEM) is used to synchronize
operations that program the PTP timers. The operations involve issuing
commands to the sideband queue. The E810 does not have a hardware
sideband queue, so the admin queue is used. The admin queue is slow.
I have observed delays in hundreds of milliseconds waiting for
ice_sq_done.
When phc2sys reads the time from the ice PTP clock and PFTSYN_SEM is
held by a task performing one of the slow operations, ice_ptp_lock can
easily time out. phc2sys gets -EBUSY and the kernel prints:
ice 0000:XX:YY.0: PTP failed to get time
These messages appear once every few seconds, causing log spam.
The E810 datasheet recommends an algorithm for reading the upper 64 bits
of the GLTSYN_TIME register. It matches what's implemented in
ice_ptp_read_src_clk_reg. It is robust against wrap-around, but not
necessarily against the concurrent setting of the register (with
GLTSYN_CMD_{INIT,ADJ}_TIME commands). Perhaps that's why
ice_ptp_gettimex64 also takes PFTSYN_SEM.
The race with time setters can be prevented without relying on the PTP
hardware semaphore. Using the "ice_adapter" from the previous patch,
we can have a common spinlock for the PFs that share the clock hardware.
It will protect the reading and writing to the GLTSYN_TIME register.
The writing is performed indirectly, by the hardware, as a result of
the driver writing GLTSYN_CMD_SYNC in ice_ptp_exec_tmr_cmd. I wasn't
sure if the ice_flush there is enough to make sure GLTSYN_TIME has been
updated, but it works well in my testing.
My test code can be seen here:
https://gitlab.com/mschmidt2/linux/-/commits/ice-ptp-host-side-lock-10
It consists of:
- kernel threads reading the time in a busy loop and looking at the
deltas between consecutive values, reporting new maxima.
- a shell script that sets the time repeatedly;
- a bpftrace probe to produce a histogram of the measured deltas.
Without the spinlock ptp_gltsyn_time_lock, it is easy to see tearing.
Deltas in the [2G, 4G) range appear in the histograms.
With the spinlock added, there is no tearing and the biggest delta I saw
was in the range [1M, 2M), that is under 2 ms.
Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com>
Signed-off-by: Michal Schmidt <mschmidt@redhat.com>
Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
116 lines
3.1 KiB
C
116 lines
3.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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// SPDX-FileCopyrightText: Copyright Red Hat
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#include <linux/bitfield.h>
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#include <linux/cleanup.h>
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#include <linux/mutex.h>
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#include <linux/pci.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/xarray.h>
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#include "ice_adapter.h"
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static DEFINE_XARRAY(ice_adapters);
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/* PCI bus number is 8 bits. Slot is 5 bits. Domain can have the rest. */
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#define INDEX_FIELD_DOMAIN GENMASK(BITS_PER_LONG - 1, 13)
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#define INDEX_FIELD_BUS GENMASK(12, 5)
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#define INDEX_FIELD_SLOT GENMASK(4, 0)
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static unsigned long ice_adapter_index(const struct pci_dev *pdev)
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{
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unsigned int domain = pci_domain_nr(pdev->bus);
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WARN_ON(domain > FIELD_MAX(INDEX_FIELD_DOMAIN));
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return FIELD_PREP(INDEX_FIELD_DOMAIN, domain) |
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FIELD_PREP(INDEX_FIELD_BUS, pdev->bus->number) |
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FIELD_PREP(INDEX_FIELD_SLOT, PCI_SLOT(pdev->devfn));
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}
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static struct ice_adapter *ice_adapter_new(void)
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{
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struct ice_adapter *adapter;
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adapter = kzalloc(sizeof(*adapter), GFP_KERNEL);
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if (!adapter)
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return NULL;
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spin_lock_init(&adapter->ptp_gltsyn_time_lock);
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refcount_set(&adapter->refcount, 1);
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return adapter;
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}
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static void ice_adapter_free(struct ice_adapter *adapter)
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{
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kfree(adapter);
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}
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DEFINE_FREE(ice_adapter_free, struct ice_adapter*, if (_T) ice_adapter_free(_T))
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/**
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* ice_adapter_get - Get a shared ice_adapter structure.
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* @pdev: Pointer to the pci_dev whose driver is getting the ice_adapter.
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*
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* Gets a pointer to a shared ice_adapter structure. Physical functions (PFs)
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* of the same multi-function PCI device share one ice_adapter structure.
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* The ice_adapter is reference-counted. The PF driver must use ice_adapter_put
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* to release its reference.
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*
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* Context: Process, may sleep.
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* Return: Pointer to ice_adapter on success.
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* ERR_PTR() on error. -ENOMEM is the only possible error.
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*/
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struct ice_adapter *ice_adapter_get(const struct pci_dev *pdev)
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{
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struct ice_adapter *ret, __free(ice_adapter_free) *adapter = NULL;
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unsigned long index = ice_adapter_index(pdev);
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adapter = ice_adapter_new();
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if (!adapter)
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return ERR_PTR(-ENOMEM);
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xa_lock(&ice_adapters);
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ret = __xa_cmpxchg(&ice_adapters, index, NULL, adapter, GFP_KERNEL);
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if (xa_is_err(ret)) {
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ret = ERR_PTR(xa_err(ret));
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goto unlock;
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}
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if (ret) {
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refcount_inc(&ret->refcount);
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goto unlock;
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}
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ret = no_free_ptr(adapter);
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unlock:
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xa_unlock(&ice_adapters);
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return ret;
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}
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/**
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* ice_adapter_put - Release a reference to the shared ice_adapter structure.
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* @pdev: Pointer to the pci_dev whose driver is releasing the ice_adapter.
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*
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* Releases the reference to ice_adapter previously obtained with
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* ice_adapter_get.
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*
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* Context: Any.
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*/
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void ice_adapter_put(const struct pci_dev *pdev)
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{
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unsigned long index = ice_adapter_index(pdev);
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struct ice_adapter *adapter;
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xa_lock(&ice_adapters);
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adapter = xa_load(&ice_adapters, index);
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if (WARN_ON(!adapter))
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goto unlock;
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if (!refcount_dec_and_test(&adapter->refcount))
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goto unlock;
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WARN_ON(__xa_erase(&ice_adapters, index) != adapter);
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ice_adapter_free(adapter);
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unlock:
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xa_unlock(&ice_adapters);
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}
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