453f0ae797
AMD MI300 systems include on-die HBM3 memory and a unique topology. And they fall under Data Fabric version 4.5 in overall design. Generally, topology information (IDs, etc.) is gathered from Data Fabric registers. However, the unique topology for MI300 means that some topology information is fixed in hardware and follows arbitrary mappings. Furthermore, not all hardware instances are software-visible, so register accesses must be adjusted. Recognize and add helper functions for the new MI300 interleave modes. Add lookup tables for fixed values where appropriate. Adjust how Die and Node IDs are found and used. Also, fix some register bitmasks that were mislabeled. Signed-off-by: Muralidhara M K <muralidhara.mk@amd.com> Co-developed-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/20240128155950.1434067-1-yazen.ghannam@amd.com
133 lines
3.4 KiB
C
133 lines
3.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* AMD Address Translation Library
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*
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* access.c : DF Indirect Access functions
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*
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* Copyright (c) 2023, Advanced Micro Devices, Inc.
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* All Rights Reserved.
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*
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* Author: Yazen Ghannam <Yazen.Ghannam@amd.com>
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*/
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#include "internal.h"
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/* Protect the PCI config register pairs used for DF indirect access. */
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static DEFINE_MUTEX(df_indirect_mutex);
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/*
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* Data Fabric Indirect Access uses FICAA/FICAD.
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*
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* Fabric Indirect Configuration Access Address (FICAA): constructed based
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* on the device's Instance Id and the PCI function and register offset of
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* the desired register.
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*
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* Fabric Indirect Configuration Access Data (FICAD): there are FICAD
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* low and high registers but so far only the low register is needed.
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*
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* Use Instance Id 0xFF to indicate a broadcast read.
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*/
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#define DF_BROADCAST 0xFF
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#define DF_FICAA_INST_EN BIT(0)
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#define DF_FICAA_REG_NUM GENMASK(10, 1)
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#define DF_FICAA_FUNC_NUM GENMASK(13, 11)
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#define DF_FICAA_INST_ID GENMASK(23, 16)
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#define DF_FICAA_REG_NUM_LEGACY GENMASK(10, 2)
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static u16 get_accessible_node(u16 node)
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{
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/*
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* On heterogeneous systems, not all AMD Nodes are accessible
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* through software-visible registers. The Node ID needs to be
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* adjusted for register accesses. But its value should not be
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* changed for the translation methods.
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*/
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if (df_cfg.flags.heterogeneous) {
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/* Only Node 0 is accessible on DF3.5 systems. */
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if (df_cfg.rev == DF3p5)
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node = 0;
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/*
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* Only the first Node in each Socket is accessible on
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* DF4.5 systems, and this is visible to software as one
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* Fabric per Socket. The Socket ID can be derived from
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* the Node ID and global shift values.
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*/
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if (df_cfg.rev == DF4p5)
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node >>= df_cfg.socket_id_shift - df_cfg.node_id_shift;
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}
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return node;
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}
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static int __df_indirect_read(u16 node, u8 func, u16 reg, u8 instance_id, u32 *lo)
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{
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u32 ficaa_addr = 0x8C, ficad_addr = 0xB8;
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struct pci_dev *F4;
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int err = -ENODEV;
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u32 ficaa = 0;
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node = get_accessible_node(node);
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if (node >= amd_nb_num())
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goto out;
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F4 = node_to_amd_nb(node)->link;
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if (!F4)
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goto out;
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/* Enable instance-specific access. */
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if (instance_id != DF_BROADCAST) {
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ficaa |= FIELD_PREP(DF_FICAA_INST_EN, 1);
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ficaa |= FIELD_PREP(DF_FICAA_INST_ID, instance_id);
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}
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/*
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* The two least-significant bits are masked when inputing the
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* register offset to FICAA.
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*/
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reg >>= 2;
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if (df_cfg.flags.legacy_ficaa) {
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ficaa_addr = 0x5C;
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ficad_addr = 0x98;
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ficaa |= FIELD_PREP(DF_FICAA_REG_NUM_LEGACY, reg);
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} else {
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ficaa |= FIELD_PREP(DF_FICAA_REG_NUM, reg);
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}
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ficaa |= FIELD_PREP(DF_FICAA_FUNC_NUM, func);
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mutex_lock(&df_indirect_mutex);
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err = pci_write_config_dword(F4, ficaa_addr, ficaa);
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if (err) {
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pr_warn("Error writing DF Indirect FICAA, FICAA=0x%x\n", ficaa);
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goto out_unlock;
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}
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err = pci_read_config_dword(F4, ficad_addr, lo);
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if (err)
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pr_warn("Error reading DF Indirect FICAD LO, FICAA=0x%x.\n", ficaa);
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pr_debug("node=%u inst=0x%x func=0x%x reg=0x%x val=0x%x",
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node, instance_id, func, reg << 2, *lo);
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out_unlock:
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mutex_unlock(&df_indirect_mutex);
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out:
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return err;
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}
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int df_indirect_read_instance(u16 node, u8 func, u16 reg, u8 instance_id, u32 *lo)
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{
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return __df_indirect_read(node, func, reg, instance_id, lo);
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}
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int df_indirect_read_broadcast(u16 node, u8 func, u16 reg, u32 *lo)
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{
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return __df_indirect_read(node, func, reg, DF_BROADCAST, lo);
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}
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