2bcb9c2508
After getting the regmap size from the device tree we should reduce the ranges to the really available registers. This allows to read only existing registers from the debug fs and makes the regmap check out-of-bounds access. For the jz4780 we have done this already. Suggested-for: Paul Cercueil <paul@crapouillou.net> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
471 lines
9 KiB
Text
471 lines
9 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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#include <dt-bindings/clock/ingenic,jz4770-cgu.h>
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#include <dt-bindings/clock/ingenic,tcu.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "ingenic,jz4770";
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "ingenic,xburst-fpu1.0-mxu1.1";
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reg = <0>;
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clocks = <&cgu JZ4770_CLK_CCLK>;
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clock-names = "cpu";
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};
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};
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cpuintc: interrupt-controller {
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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compatible = "mti,cpu-interrupt-controller";
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};
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intc: interrupt-controller@10001000 {
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compatible = "ingenic,jz4770-intc";
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reg = <0x10001000 0x40>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&cpuintc>;
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interrupts = <2>;
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};
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ext: ext {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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};
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osc32k: osc32k {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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};
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cgu: jz4770-cgu@10000000 {
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compatible = "ingenic,jz4770-cgu", "simple-mfd";
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reg = <0x10000000 0x100>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x10000000 0x100>;
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clocks = <&ext>, <&osc32k>;
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clock-names = "ext", "osc32k";
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#clock-cells = <1>;
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otg_phy: usb-phy@3c {
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compatible = "ingenic,jz4770-phy";
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reg = <0x3c 0x10>;
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clocks = <&cgu JZ4770_CLK_OTG_PHY>;
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#phy-cells = <0>;
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};
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};
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tcu: timer@10002000 {
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compatible = "ingenic,jz4770-tcu", "simple-mfd";
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reg = <0x10002000 0x1000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x10002000 0x1000>;
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#clock-cells = <1>;
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clocks = <&cgu JZ4770_CLK_RTC>,
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<&cgu JZ4770_CLK_EXT>,
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<&cgu JZ4770_CLK_PCLK>;
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clock-names = "rtc", "ext", "pclk";
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&intc>;
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interrupts = <27 26 25>;
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watchdog: watchdog@0 {
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compatible = "ingenic,jz4770-watchdog",
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"ingenic,jz4740-watchdog";
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reg = <0x0 0xc>;
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clocks = <&tcu TCU_CLK_WDT>;
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clock-names = "wdt";
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};
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pwm: pwm@40 {
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compatible = "ingenic,jz4770-pwm", "ingenic,jz4740-pwm";
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reg = <0x40 0x80>;
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#pwm-cells = <3>;
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clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
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<&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>,
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<&tcu TCU_CLK_TIMER4>, <&tcu TCU_CLK_TIMER5>,
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<&tcu TCU_CLK_TIMER6>, <&tcu TCU_CLK_TIMER7>;
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clock-names = "timer0", "timer1", "timer2", "timer3",
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"timer4", "timer5", "timer6", "timer7";
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};
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ost: timer@e0 {
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compatible = "ingenic,jz4770-ost";
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reg = <0xe0 0x20>;
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clocks = <&tcu TCU_CLK_OST>;
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clock-names = "ost";
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interrupts = <15>;
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};
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};
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rtc: rtc@10003000 {
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compatible = "ingenic,jz4770-rtc", "ingenic,jz4760-rtc";
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reg = <0x10003000 0x40>;
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interrupt-parent = <&intc>;
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interrupts = <32>;
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};
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pinctrl: pin-controller@10010000 {
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compatible = "ingenic,jz4770-pinctrl";
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reg = <0x10010000 0x600>;
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#address-cells = <1>;
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#size-cells = <0>;
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gpa: gpio@0 {
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compatible = "ingenic,jz4770-gpio";
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reg = <0>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 0 32>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <17>;
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};
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gpb: gpio@1 {
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compatible = "ingenic,jz4770-gpio";
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reg = <1>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 32 32>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <16>;
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};
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gpc: gpio@2 {
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compatible = "ingenic,jz4770-gpio";
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reg = <2>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 64 32>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <15>;
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};
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gpd: gpio@3 {
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compatible = "ingenic,jz4770-gpio";
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reg = <3>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 96 32>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <14>;
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};
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gpe: gpio@4 {
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compatible = "ingenic,jz4770-gpio";
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reg = <4>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 128 32>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <13>;
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};
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gpf: gpio@5 {
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compatible = "ingenic,jz4770-gpio";
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reg = <5>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 160 32>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <12>;
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};
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};
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aic: audio-controller@10020000 {
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compatible = "ingenic,jz4770-i2s";
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reg = <0x10020000 0x94>;
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#sound-dai-cells = <0>;
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clocks = <&cgu JZ4770_CLK_AIC>, <&cgu JZ4770_CLK_I2S>,
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<&cgu JZ4770_CLK_EXT>, <&cgu JZ4770_CLK_PLL0>;
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clock-names = "aic", "i2s", "ext", "pll half";
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interrupt-parent = <&intc>;
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interrupts = <34>;
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dmas = <&dmac0 25 0xffffffff>, <&dmac0 24 0xffffffff>;
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dma-names = "rx", "tx";
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};
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codec: audio-codec@100200a0 {
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compatible = "ingenic,jz4770-codec";
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reg = <0x100200a4 0x8>;
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#sound-dai-cells = <0>;
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clocks = <&cgu JZ4770_CLK_AIC>;
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clock-names = "aic";
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};
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mmc0: mmc@10021000 {
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compatible = "ingenic,jz4770-mmc", "ingenic,jz4760-mmc";
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reg = <0x10021000 0x1000>;
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clocks = <&cgu JZ4770_CLK_MMC0>;
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clock-names = "mmc";
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interrupt-parent = <&intc>;
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interrupts = <37>;
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dmas = <&dmac1 27 0xffffffff>, <&dmac1 26 0xffffffff>;
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dma-names = "rx", "tx";
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cap-sd-highspeed;
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cap-mmc-highspeed;
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cap-sdio-irq;
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status = "disabled";
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};
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mmc1: mmc@10022000 {
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compatible = "ingenic,jz4770-mmc", "ingenic,jz4760-mmc";
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reg = <0x10022000 0x1000>;
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clocks = <&cgu JZ4770_CLK_MMC1>;
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clock-names = "mmc";
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interrupt-parent = <&intc>;
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interrupts = <36>;
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dmas = <&dmac1 31 0xffffffff>, <&dmac1 30 0xffffffff>;
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dma-names = "rx", "tx";
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cap-sd-highspeed;
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cap-mmc-highspeed;
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cap-sdio-irq;
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status = "disabled";
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};
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mmc2: mmc@10023000 {
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compatible = "ingenic,jz4770-mmc", "ingenic,jz4760-mmc";
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reg = <0x10023000 0x1000>;
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clocks = <&cgu JZ4770_CLK_MMC2>;
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clock-names = "mmc";
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interrupt-parent = <&intc>;
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interrupts = <35>;
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dmas = <&dmac1 37 0xffffffff>, <&dmac1 36 0xffffffff>;
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dma-names = "rx", "tx";
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cap-sd-highspeed;
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cap-mmc-highspeed;
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cap-sdio-irq;
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status = "disabled";
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};
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uart0: serial@10030000 {
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compatible = "ingenic,jz4770-uart";
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reg = <0x10030000 0x100>;
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clocks = <&ext>, <&cgu JZ4770_CLK_UART0>;
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clock-names = "baud", "module";
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interrupt-parent = <&intc>;
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interrupts = <5>;
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status = "disabled";
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};
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uart1: serial@10031000 {
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compatible = "ingenic,jz4770-uart";
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reg = <0x10031000 0x100>;
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clocks = <&ext>, <&cgu JZ4770_CLK_UART1>;
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clock-names = "baud", "module";
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interrupt-parent = <&intc>;
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interrupts = <4>;
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status = "disabled";
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};
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uart2: serial@10032000 {
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compatible = "ingenic,jz4770-uart";
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reg = <0x10032000 0x100>;
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clocks = <&ext>, <&cgu JZ4770_CLK_UART2>;
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clock-names = "baud", "module";
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interrupt-parent = <&intc>;
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interrupts = <3>;
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status = "disabled";
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};
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uart3: serial@10033000 {
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compatible = "ingenic,jz4770-uart";
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reg = <0x10033000 0x100>;
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clocks = <&ext>, <&cgu JZ4770_CLK_UART3>;
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clock-names = "baud", "module";
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interrupt-parent = <&intc>;
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interrupts = <2>;
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status = "disabled";
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};
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adc: adc@10070000 {
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compatible = "ingenic,jz4770-adc";
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reg = <0x10070000 0x30>;
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#io-channel-cells = <1>;
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clocks = <&cgu JZ4770_CLK_ADC>;
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clock-names = "adc";
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interrupt-parent = <&intc>;
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interrupts = <18>;
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};
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gpu: gpu@13040000 {
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compatible = "vivante,gc";
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reg = <0x13040000 0x10000>;
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clocks = <&cgu JZ4770_CLK_GPU>,
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<&cgu JZ4770_CLK_GPU>,
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<&cgu JZ4770_CLK_GPU>;
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clock-names = "bus", "core", "shader";
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interrupt-parent = <&intc>;
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interrupts = <6>;
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};
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lcd: lcd-controller@13050000 {
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compatible = "ingenic,jz4770-lcd";
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reg = <0x13050000 0x130>; /* tbc */
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interrupt-parent = <&intc>;
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interrupts = <31>;
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clocks = <&cgu JZ4770_CLK_LPCLK_MUX>;
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clock-names = "lcd_pclk";
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};
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dmac0: dma-controller@13420000 {
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compatible = "ingenic,jz4770-dma";
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reg = <0x13420000 0xC0>, <0x13420300 0x20>;
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#dma-cells = <2>;
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clocks = <&cgu JZ4770_CLK_DMA>;
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interrupt-parent = <&intc>;
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interrupts = <24>;
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};
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dmac1: dma-controller@13420100 {
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compatible = "ingenic,jz4770-dma";
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reg = <0x13420100 0xC0>, <0x13420400 0x20>;
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#dma-cells = <2>;
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clocks = <&cgu JZ4770_CLK_DMA>;
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interrupt-parent = <&intc>;
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interrupts = <23>;
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};
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uhc: usb@13430000 {
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compatible = "generic-ohci";
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reg = <0x13430000 0x1000>;
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clocks = <&cgu JZ4770_CLK_UHC>, <&cgu JZ4770_CLK_UHC_PHY>;
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assigned-clocks = <&cgu JZ4770_CLK_UHC>;
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assigned-clock-rates = <48000000>;
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interrupt-parent = <&intc>;
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interrupts = <20>;
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status = "disabled";
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};
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usb_otg: usb@13440000 {
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compatible = "ingenic,jz4770-musb";
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reg = <0x13440000 0x10000>;
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clocks = <&cgu JZ4770_CLK_OTG>;
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clock-names = "udc";
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interrupt-parent = <&intc>;
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interrupts = <21>;
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interrupt-names = "mc";
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phys = <&otg_phy>;
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usb-role-switch;
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};
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rom: memory@1fc00000 {
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compatible = "mtd-rom";
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probe-type = "map_rom";
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reg = <0x1fc00000 0x2000>;
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bank-width = <4>;
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device-width = <1>;
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};
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};
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