eba54cbb92
The ocelot driver was converted to phylink, and that expects a valid phy_interface_t. Without a phy-mode, of_get_phy_mode returns PHY_INTERFACE_MODE_NA, which is not ideal because phylink rejects that. The ocelot driver was patched to treat PHY_INTERFACE_MODE_NA as PHY_INTERFACE_MODE_INTERNAL to work with the broken DT blobs, but we should fix the device trees and specify the phy-mode too. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
71 lines
948 B
Text
71 lines
948 B
Text
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/* Copyright (c) 2017 Microsemi Corporation */
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/dts-v1/;
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#include "ocelot.dtsi"
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/ {
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compatible = "mscc,ocelot-pcb123", "mscc,ocelot";
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x0e000000>;
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};
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};
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&uart0 {
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status = "okay";
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};
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&uart2 {
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status = "okay";
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};
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&spi {
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status = "okay";
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flash@0 {
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compatible = "macronix,mx25l25635f", "jedec,spi-nor";
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spi-max-frequency = <20000000>;
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reg = <0>;
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};
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};
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&i2c {
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clock-frequency = <100000>;
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i2c-sda-hold-time-ns = <300>;
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status = "okay";
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};
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&mdio0 {
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status = "okay";
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};
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&port0 {
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status = "okay";
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phy-handle = <&phy0>;
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phy-mode = "internal";
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};
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&port1 {
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status = "okay";
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phy-handle = <&phy1>;
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phy-mode = "internal";
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};
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&port2 {
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status = "okay";
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phy-handle = <&phy2>;
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phy-mode = "internal";
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};
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&port3 {
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status = "okay";
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phy-handle = <&phy3>;
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phy-mode = "internal";
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};
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