889fcbe949
Replaces a bunch of unnecessarily duplicated boilerplate in per-chipset code with a simpler, common, implementation. Channel "awaken" notify code is completely gone for now. KMS has never made use of it so far, and event notify handling is about to be changed in general anyway. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
387 lines
11 KiB
C
387 lines
11 KiB
C
/*
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* Copyright 2018 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "wndw.h"
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#include "atom.h"
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_plane_helper.h>
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#include <nouveau_bo.h>
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#include <nvif/if0014.h>
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#include <nvif/pushc37b.h>
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#include <nvhw/class/clc37e.h>
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static int
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wndwc37e_csc_clr(struct nv50_wndw *wndw)
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{
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return 0;
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}
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static int
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wndwc37e_csc_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
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{
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struct nvif_push *push = wndw->wndw.push;
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int ret;
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if ((ret = PUSH_WAIT(push, 13)))
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return ret;
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PUSH_MTHD(push, NVC37E, SET_CSC_RED2RED, asyw->csc.matrix, 12);
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return 0;
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}
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static int
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wndwc37e_ilut_clr(struct nv50_wndw *wndw)
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{
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struct nvif_push *push = wndw->wndw.push;
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int ret;
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if ((ret = PUSH_WAIT(push, 2)))
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return ret;
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PUSH_MTHD(push, NVC37E, SET_CONTEXT_DMA_INPUT_LUT, 0x00000000);
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return 0;
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}
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static int
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wndwc37e_ilut_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
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{
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struct nvif_push *push = wndw->wndw.push;
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int ret;
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if ((ret = PUSH_WAIT(push, 4)))
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return ret;
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PUSH_MTHD(push, NVC37E, SET_CONTROL_INPUT_LUT,
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NVVAL(NVC37E, SET_CONTROL_INPUT_LUT, OUTPUT_MODE, asyw->xlut.i.output_mode) |
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NVVAL(NVC37E, SET_CONTROL_INPUT_LUT, RANGE, asyw->xlut.i.range) |
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NVVAL(NVC37E, SET_CONTROL_INPUT_LUT, SIZE, asyw->xlut.i.size),
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SET_OFFSET_INPUT_LUT, asyw->xlut.i.offset >> 8,
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SET_CONTEXT_DMA_INPUT_LUT, asyw->xlut.handle);
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return 0;
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}
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static void
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wndwc37e_ilut(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw, int size)
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{
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asyw->xlut.i.size = size == 1024 ? NVC37E_SET_CONTROL_INPUT_LUT_SIZE_SIZE_1025 :
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NVC37E_SET_CONTROL_INPUT_LUT_SIZE_SIZE_257;
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asyw->xlut.i.range = NVC37E_SET_CONTROL_INPUT_LUT_RANGE_UNITY;
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asyw->xlut.i.output_mode = NVC37E_SET_CONTROL_INPUT_LUT_OUTPUT_MODE_INTERPOLATE;
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asyw->xlut.i.load = head907d_olut_load;
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}
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int
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wndwc37e_blend_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
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{
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struct nvif_push *push = wndw->wndw.push;
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int ret;
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if ((ret = PUSH_WAIT(push, 8)))
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return ret;
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PUSH_MTHD(push, NVC37E, SET_COMPOSITION_CONTROL,
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NVDEF(NVC37E, SET_COMPOSITION_CONTROL, COLOR_KEY_SELECT, DISABLE) |
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NVVAL(NVC37E, SET_COMPOSITION_CONTROL, DEPTH, asyw->blend.depth),
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SET_COMPOSITION_CONSTANT_ALPHA,
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NVVAL(NVC37E, SET_COMPOSITION_CONSTANT_ALPHA, K1, asyw->blend.k1) |
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NVVAL(NVC37E, SET_COMPOSITION_CONSTANT_ALPHA, K2, 0),
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SET_COMPOSITION_FACTOR_SELECT,
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NVVAL(NVC37E, SET_COMPOSITION_FACTOR_SELECT, SRC_COLOR_FACTOR_MATCH_SELECT,
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asyw->blend.src_color) |
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NVVAL(NVC37E, SET_COMPOSITION_FACTOR_SELECT, SRC_COLOR_FACTOR_NO_MATCH_SELECT,
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asyw->blend.src_color) |
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NVVAL(NVC37E, SET_COMPOSITION_FACTOR_SELECT, DST_COLOR_FACTOR_MATCH_SELECT,
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asyw->blend.dst_color) |
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NVVAL(NVC37E, SET_COMPOSITION_FACTOR_SELECT, DST_COLOR_FACTOR_NO_MATCH_SELECT,
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asyw->blend.dst_color),
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SET_KEY_ALPHA,
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NVVAL(NVC37E, SET_KEY_ALPHA, MIN, 0x0000) |
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NVVAL(NVC37E, SET_KEY_ALPHA, MAX, 0xffff),
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SET_KEY_RED_CR,
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NVVAL(NVC37E, SET_KEY_RED_CR, MIN, 0x0000) |
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NVVAL(NVC37E, SET_KEY_RED_CR, MAX, 0xffff),
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SET_KEY_GREEN_Y,
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NVVAL(NVC37E, SET_KEY_GREEN_Y, MIN, 0x0000) |
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NVVAL(NVC37E, SET_KEY_GREEN_Y, MAX, 0xffff),
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SET_KEY_BLUE_CB,
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NVVAL(NVC37E, SET_KEY_BLUE_CB, MIN, 0x0000) |
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NVVAL(NVC37E, SET_KEY_BLUE_CB, MAX, 0xffff));
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return 0;
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}
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int
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wndwc37e_image_clr(struct nv50_wndw *wndw)
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{
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struct nvif_push *push = wndw->wndw.push;
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int ret;
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if ((ret = PUSH_WAIT(push, 4)))
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return ret;
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PUSH_MTHD(push, NVC37E, SET_PRESENT_CONTROL,
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NVVAL(NVC37E, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, 0) |
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NVDEF(NVC37E, SET_PRESENT_CONTROL, BEGIN_MODE, NON_TEARING));
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PUSH_MTHD(push, NVC37E, SET_CONTEXT_DMA_ISO(0), 0x00000000);
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return 0;
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}
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static int
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wndwc37e_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
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{
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struct nvif_push *push = wndw->wndw.push;
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int ret;
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if ((ret = PUSH_WAIT(push, 17)))
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return ret;
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PUSH_MTHD(push, NVC37E, SET_PRESENT_CONTROL,
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NVVAL(NVC37E, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval) |
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NVVAL(NVC37E, SET_PRESENT_CONTROL, BEGIN_MODE, asyw->image.mode) |
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NVDEF(NVC37E, SET_PRESENT_CONTROL, TIMESTAMP_MODE, DISABLE));
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PUSH_MTHD(push, NVC37E, SET_SIZE,
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NVVAL(NVC37E, SET_SIZE, WIDTH, asyw->image.w) |
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NVVAL(NVC37E, SET_SIZE, HEIGHT, asyw->image.h),
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SET_STORAGE,
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NVVAL(NVC37E, SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh) |
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NVVAL(NVC37E, SET_STORAGE, MEMORY_LAYOUT, asyw->image.layout),
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SET_PARAMS,
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NVVAL(NVC37E, SET_PARAMS, FORMAT, asyw->image.format) |
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NVVAL(NVC37E, SET_PARAMS, COLOR_SPACE, asyw->image.colorspace) |
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NVDEF(NVC37E, SET_PARAMS, INPUT_RANGE, BYPASS) |
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NVDEF(NVC37E, SET_PARAMS, UNDERREPLICATE, DISABLE) |
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NVDEF(NVC37E, SET_PARAMS, DE_GAMMA, NONE) |
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NVVAL(NVC37E, SET_PARAMS, CSC, asyw->csc.valid) |
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NVDEF(NVC37E, SET_PARAMS, CLAMP_BEFORE_BLEND, DISABLE) |
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NVDEF(NVC37E, SET_PARAMS, SWAP_UV, DISABLE),
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SET_PLANAR_STORAGE(0),
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NVVAL(NVC37E, SET_PLANAR_STORAGE, PITCH, asyw->image.blocks[0]) |
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NVVAL(NVC37E, SET_PLANAR_STORAGE, PITCH, asyw->image.pitch[0] >> 6));
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PUSH_MTHD(push, NVC37E, SET_CONTEXT_DMA_ISO(0), asyw->image.handle, 1);
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PUSH_MTHD(push, NVC37E, SET_OFFSET(0), asyw->image.offset[0] >> 8);
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PUSH_MTHD(push, NVC37E, SET_POINT_IN(0),
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NVVAL(NVC37E, SET_POINT_IN, X, asyw->state.src_x >> 16) |
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NVVAL(NVC37E, SET_POINT_IN, Y, asyw->state.src_y >> 16));
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PUSH_MTHD(push, NVC37E, SET_SIZE_IN,
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NVVAL(NVC37E, SET_SIZE_IN, WIDTH, asyw->state.src_w >> 16) |
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NVVAL(NVC37E, SET_SIZE_IN, HEIGHT, asyw->state.src_h >> 16));
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PUSH_MTHD(push, NVC37E, SET_SIZE_OUT,
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NVVAL(NVC37E, SET_SIZE_OUT, WIDTH, asyw->state.crtc_w) |
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NVVAL(NVC37E, SET_SIZE_OUT, HEIGHT, asyw->state.crtc_h));
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return 0;
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}
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int
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wndwc37e_ntfy_clr(struct nv50_wndw *wndw)
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{
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struct nvif_push *push = wndw->wndw.push;
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int ret;
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if ((ret = PUSH_WAIT(push, 2)))
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return ret;
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PUSH_MTHD(push, NVC37E, SET_CONTEXT_DMA_NOTIFIER, 0x00000000);
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return 0;
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}
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int
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wndwc37e_ntfy_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
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{
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struct nvif_push *push = wndw->wndw.push;
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int ret;
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if ((ret = PUSH_WAIT(push, 3)))
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return ret;
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PUSH_MTHD(push, NVC37E, SET_CONTEXT_DMA_NOTIFIER, asyw->ntfy.handle,
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SET_NOTIFIER_CONTROL,
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NVVAL(NVC37E, SET_NOTIFIER_CONTROL, MODE, asyw->ntfy.awaken) |
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NVVAL(NVC37E, SET_NOTIFIER_CONTROL, OFFSET, asyw->ntfy.offset >> 4));
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return 0;
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}
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int
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wndwc37e_sema_clr(struct nv50_wndw *wndw)
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{
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struct nvif_push *push = wndw->wndw.push;
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int ret;
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if ((ret = PUSH_WAIT(push, 2)))
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return ret;
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PUSH_MTHD(push, NVC37E, SET_CONTEXT_DMA_SEMAPHORE, 0x00000000);
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return 0;
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}
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int
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wndwc37e_sema_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
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{
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struct nvif_push *push = wndw->wndw.push;
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int ret;
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if ((ret = PUSH_WAIT(push, 5)))
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return ret;
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PUSH_MTHD(push, NVC37E, SET_SEMAPHORE_CONTROL, asyw->sema.offset,
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SET_SEMAPHORE_ACQUIRE, asyw->sema.acquire,
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SET_SEMAPHORE_RELEASE, asyw->sema.release,
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SET_CONTEXT_DMA_SEMAPHORE, asyw->sema.handle);
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return 0;
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}
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int
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wndwc37e_update(struct nv50_wndw *wndw, u32 *interlock)
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{
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struct nvif_push *push = wndw->wndw.push;
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int ret;
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if ((ret = PUSH_WAIT(push, 5)))
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return ret;
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PUSH_MTHD(push, NVC37E, SET_INTERLOCK_FLAGS, interlock[NV50_DISP_INTERLOCK_CURS] << 1 |
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interlock[NV50_DISP_INTERLOCK_CORE],
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SET_WINDOW_INTERLOCK_FLAGS, interlock[NV50_DISP_INTERLOCK_WNDW]);
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PUSH_MTHD(push, NVC37E, UPDATE, 0x00000001 |
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NVVAL(NVC37E, UPDATE, INTERLOCK_WITH_WIN_IMM,
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!!(interlock[NV50_DISP_INTERLOCK_WIMM] & wndw->interlock.data)));
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return PUSH_KICK(push);
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}
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void
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wndwc37e_release(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
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struct nv50_head_atom *asyh)
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{
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}
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int
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wndwc37e_acquire(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
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struct nv50_head_atom *asyh)
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{
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return drm_atomic_helper_check_plane_state(&asyw->state, &asyh->state,
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DRM_PLANE_HELPER_NO_SCALING,
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DRM_PLANE_HELPER_NO_SCALING,
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true, true);
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}
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static const u32
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wndwc37e_format[] = {
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DRM_FORMAT_C8,
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DRM_FORMAT_YUYV,
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DRM_FORMAT_UYVY,
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DRM_FORMAT_XRGB8888,
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DRM_FORMAT_ARGB8888,
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DRM_FORMAT_RGB565,
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DRM_FORMAT_XRGB1555,
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DRM_FORMAT_ARGB1555,
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DRM_FORMAT_XBGR2101010,
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DRM_FORMAT_ABGR2101010,
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DRM_FORMAT_XBGR8888,
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DRM_FORMAT_ABGR8888,
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DRM_FORMAT_XRGB2101010,
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DRM_FORMAT_ARGB2101010,
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DRM_FORMAT_XBGR16161616F,
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DRM_FORMAT_ABGR16161616F,
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0
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};
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static const struct nv50_wndw_func
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wndwc37e = {
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.acquire = wndwc37e_acquire,
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.release = wndwc37e_release,
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.sema_set = wndwc37e_sema_set,
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.sema_clr = wndwc37e_sema_clr,
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.ntfy_set = wndwc37e_ntfy_set,
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.ntfy_clr = wndwc37e_ntfy_clr,
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.ntfy_reset = corec37d_ntfy_init,
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.ntfy_wait_begun = base507c_ntfy_wait_begun,
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.ilut = wndwc37e_ilut,
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.ilut_size = 1024,
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.xlut_set = wndwc37e_ilut_set,
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.xlut_clr = wndwc37e_ilut_clr,
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.csc = base907c_csc,
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.csc_set = wndwc37e_csc_set,
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.csc_clr = wndwc37e_csc_clr,
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.image_set = wndwc37e_image_set,
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.image_clr = wndwc37e_image_clr,
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.blend_set = wndwc37e_blend_set,
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.update = wndwc37e_update,
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};
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int
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wndwc37e_new_(const struct nv50_wndw_func *func, struct nouveau_drm *drm,
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enum drm_plane_type type, int index, s32 oclass, u32 heads,
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struct nv50_wndw **pwndw)
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{
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struct nvif_disp_chan_v0 args = {
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.id = index,
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};
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struct nv50_disp *disp = nv50_disp(drm->dev);
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struct nv50_wndw *wndw;
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int ret;
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ret = nv50_wndw_new_(func, drm->dev, type, "wndw", index,
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wndwc37e_format, heads, NV50_DISP_INTERLOCK_WNDW,
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BIT(index), &wndw);
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if (*pwndw = wndw, ret)
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return ret;
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ret = nv50_dmac_create(&drm->client.device, &disp->disp->object,
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&oclass, 0, &args, sizeof(args),
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disp->sync->offset, &wndw->wndw);
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if (ret) {
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NV_ERROR(drm, "qndw%04x allocation failed: %d\n", oclass, ret);
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return ret;
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}
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wndw->ntfy = NV50_DISP_WNDW_NTFY(wndw->id);
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wndw->sema = NV50_DISP_WNDW_SEM0(wndw->id);
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wndw->data = 0x00000000;
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return 0;
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}
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int
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wndwc37e_new(struct nouveau_drm *drm, enum drm_plane_type type, int index,
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s32 oclass, struct nv50_wndw **pwndw)
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{
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return wndwc37e_new_(&wndwc37e, drm, type, index, oclass,
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BIT(index >> 1), pwndw);
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}
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