151e7d7503
With the hardware TopDown metrics feature, the sample-read feature should be supported for a TopDown group, e.g., sample a non-topdown event and read a Topdown metric group. But the current perf record code errors are out. For a TopDown metric group,the slots event must be the leader of the group, but the leader slots event doesn't support sampling. To support sample-read the TopDown metric group, uses the 2nd event of the group as the "leader" for the purposes of sampling. Only the platform with the TopDown metric feature supports sample-read the topdown group. In commitacb65150a4("perf record: Support sample-read topdown metric group"), it adds arch_topdown_sample_read() to indicate whether the TopDown group supports sample-read, it should only work on the non-hybrid systems, this patch extends the support for hybrid platforms. Before: # ./perf record -e "{cpu_core/slots/,cpu_core/cycles/,cpu_core/topdown-retiring/}:S" -a sleep 1 Error: The sys_perf_event_open() syscall returned with 22 (Invalid argument) for event (cpu_core/topdown-retiring/). /bin/dmesg | grep -i perf may provide additional information. After: # ./perf record -e "{cpu_core/slots/,cpu_core/cycles/,cpu_core/topdown-retiring/}:S" -a sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 0.238 MB perf.data (369 samples) ] Fixes:acb65150a4("perf record: Support sample-read topdown metric group") Reviewed-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Zhengjun Xing <zhengjun.xing@linux.intel.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Link: https://lore.kernel.org/r/20220602153603.1884710-1-zhengjun.xing@linux.intel.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
63 lines
1.7 KiB
C
63 lines
1.7 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <stdio.h>
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#include <stdlib.h>
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#include "util/evsel.h"
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#include "util/env.h"
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#include "util/pmu.h"
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#include "linux/string.h"
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#include "evsel.h"
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void arch_evsel__set_sample_weight(struct evsel *evsel)
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{
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evsel__set_sample_bit(evsel, WEIGHT_STRUCT);
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}
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void arch_evsel__fixup_new_cycles(struct perf_event_attr *attr)
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{
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struct perf_env env = { .total_mem = 0, } ;
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if (!perf_env__cpuid(&env))
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return;
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/*
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* On AMD, precise cycles event sampling internally uses IBS pmu.
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* But IBS does not have filtering capabilities and perf by default
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* sets exclude_guest = 1. This makes IBS pmu event init fail and
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* thus perf ends up doing non-precise sampling. Avoid it by clearing
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* exclude_guest.
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*/
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if (env.cpuid && strstarts(env.cpuid, "AuthenticAMD"))
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attr->exclude_guest = 0;
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free(env.cpuid);
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}
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/* Check whether the evsel's PMU supports the perf metrics */
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bool evsel__sys_has_perf_metrics(const struct evsel *evsel)
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{
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const char *pmu_name = evsel->pmu_name ? evsel->pmu_name : "cpu";
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/*
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* The PERF_TYPE_RAW type is the core PMU type, e.g., "cpu" PMU
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* on a non-hybrid machine, "cpu_core" PMU on a hybrid machine.
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* The slots event is only available for the core PMU, which
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* supports the perf metrics feature.
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* Checking both the PERF_TYPE_RAW type and the slots event
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* should be good enough to detect the perf metrics feature.
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*/
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if ((evsel->core.attr.type == PERF_TYPE_RAW) &&
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pmu_have_event(pmu_name, "slots"))
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return true;
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return false;
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}
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bool arch_evsel__must_be_in_group(const struct evsel *evsel)
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{
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if (!evsel__sys_has_perf_metrics(evsel))
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return false;
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return evsel->name &&
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(strcasestr(evsel->name, "slots") ||
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strcasestr(evsel->name, "topdown"));
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}
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