Hawking Zhang f926464e59 drm/amdgpu: enable imu_rlc_ram programming for v11_0_3 ... All gc v11_0_3 registers in gcvml2 range have different register offset from the ones in gc v11_0_0. v11_0_3 imu_rlc_ram programming has to be separated from v11_0_0 implementation v2: fix checkpatch errors (Alex) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Yang Wang <KevinYang.Wang@amd.com> Reviewed-by: Frank Min <Frank.Min@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2022-08-30 16:37:14 -04:00
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acp	drm: amd/acp: fix broken menu structure	2020-03-13 11:52:35 -04:00
amdgpu	drm/amdgpu: enable imu_rlc_ram programming for v11_0_3	2022-08-30 16:37:14 -04:00
amdkfd	drm/amdkfd: Added GFX 11.0.3 Support	2022-08-30 16:37:11 -04:00
display	drm/amd/display: clean up some inconsistent indentings	2022-08-29 18:00:55 -04:00
include	drm/amdgpu: add gc v11_0_3 ip headers	2022-08-30 16:36:42 -04:00
pm	drm/amdgpu: added supported smu 13.0.10 sw pptable	2022-08-29 18:00:28 -04:00